| Message ID | 20201020153944.18047-1-manivannan.sadhasivam@linaro.org (mailing list archive) |
|---|---|
| State | New, archived |
| Delegated to: | viresh kumar |
| Headers | show |
| Series | [v3,1/2] dt-bindings: arm: cpus: Document 'qcom,freq-domain' property | expand |
Hi, Manivannan On Tue, 2020-10-20 at 21:09 +0530, Manivannan Sadhasivam wrote: > Add devicetree documentation for 'qcom,freq-domain' property specific > to Qualcomm CPUs. This property is used to reference the CPUFREQ node > along with Domain ID (0/1). > > Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> > --- > Documentation/devicetree/bindings/arm/cpus.yaml | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/Documentation/devicetree/bindings/arm/cpus.yaml b/Documentation/devicetree/bindings/arm/cpus.yaml > index 1222bf1831fa..f40564bf004f 100644 > --- a/Documentation/devicetree/bindings/arm/cpus.yaml > +++ b/Documentation/devicetree/bindings/arm/cpus.yaml > @@ -290,6 +290,12 @@ properties: > > * arm/msm/qcom,kpss-acc.txt > > + qcom,freq-domain: Do you mind to change "qcom, freq-domain" to common naming? or drop the prefix. So that we can use this CPU node and map it to each freq-domain. Thanks a lot. > + $ref: '/schemas/types.yaml#/definitions/phandle-array' > + description: | > + CPUs supporting freq-domain must set their "qcom,freq-domain" property > + with phandle to a cpufreq_hw node followed by the Domain ID(0/1). > + > rockchip,pmu: > $ref: '/schemas/types.yaml#/definitions/phandle' > description: |
Hi, On Wed, Oct 21, 2020 at 10:36:43AM +0800, Hector Yuan wrote: > Hi, Manivannan > > On Tue, 2020-10-20 at 21:09 +0530, Manivannan Sadhasivam wrote: > > Add devicetree documentation for 'qcom,freq-domain' property specific > > to Qualcomm CPUs. This property is used to reference the CPUFREQ node > > along with Domain ID (0/1). > > > > Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> > > --- > > Documentation/devicetree/bindings/arm/cpus.yaml | 6 ++++++ > > 1 file changed, 6 insertions(+) > > > > diff --git a/Documentation/devicetree/bindings/arm/cpus.yaml b/Documentation/devicetree/bindings/arm/cpus.yaml > > index 1222bf1831fa..f40564bf004f 100644 > > --- a/Documentation/devicetree/bindings/arm/cpus.yaml > > +++ b/Documentation/devicetree/bindings/arm/cpus.yaml > > @@ -290,6 +290,12 @@ properties: > > > > * arm/msm/qcom,kpss-acc.txt > > > > + qcom,freq-domain: > Do you mind to change "qcom, freq-domain" to common naming? or drop the > prefix. So that we can use this CPU node and map it to each freq-domain. > Thanks a lot. I can do that but did the domain value match for other platforms as well? Thanks, Mani > > > + $ref: '/schemas/types.yaml#/definitions/phandle-array' > > + description: | > > + CPUs supporting freq-domain must set their "qcom,freq-domain" property > > + with phandle to a cpufreq_hw node followed by the Domain ID(0/1). > > + > > rockchip,pmu: > > $ref: '/schemas/types.yaml#/definitions/phandle' > > description: | >
On 21-10-20, 15:29, Manivannan Sadhasivam wrote: > Hi, > > On Wed, Oct 21, 2020 at 10:36:43AM +0800, Hector Yuan wrote: > > Hi, Manivannan > > > > On Tue, 2020-10-20 at 21:09 +0530, Manivannan Sadhasivam wrote: > > > Add devicetree documentation for 'qcom,freq-domain' property specific > > > to Qualcomm CPUs. This property is used to reference the CPUFREQ node > > > along with Domain ID (0/1). > > > > > > Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> > > > --- > > > Documentation/devicetree/bindings/arm/cpus.yaml | 6 ++++++ > > > 1 file changed, 6 insertions(+) > > > > > > diff --git a/Documentation/devicetree/bindings/arm/cpus.yaml b/Documentation/devicetree/bindings/arm/cpus.yaml > > > index 1222bf1831fa..f40564bf004f 100644 > > > --- a/Documentation/devicetree/bindings/arm/cpus.yaml > > > +++ b/Documentation/devicetree/bindings/arm/cpus.yaml > > > @@ -290,6 +290,12 @@ properties: > > > > > > * arm/msm/qcom,kpss-acc.txt > > > > > > + qcom,freq-domain: > > Do you mind to change "qcom, freq-domain" to common naming? or drop the > > prefix. So that we can use this CPU node and map it to each freq-domain. > > Thanks a lot. > > I can do that but did the domain value match for other platforms as well? I am not sure if you can. The code needs to be backward compatible so it can support all devices shipped with older bootloaders and latest kernels. And so changing the bindings isn't a good idea normally. > > > > > > + $ref: '/schemas/types.yaml#/definitions/phandle-array' > > > + description: | > > > + CPUs supporting freq-domain must set their "qcom,freq-domain" property > > > + with phandle to a cpufreq_hw node followed by the Domain ID(0/1). > > > + > > > rockchip,pmu: > > > $ref: '/schemas/types.yaml#/definitions/phandle' > > > description: | > >
On Tue, Oct 20, 2020 at 09:09:43PM +0530, Manivannan Sadhasivam wrote: > Add devicetree documentation for 'qcom,freq-domain' property specific > to Qualcomm CPUs. This property is used to reference the CPUFREQ node > along with Domain ID (0/1). > > Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> > --- > Documentation/devicetree/bindings/arm/cpus.yaml | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/Documentation/devicetree/bindings/arm/cpus.yaml b/Documentation/devicetree/bindings/arm/cpus.yaml > index 1222bf1831fa..f40564bf004f 100644 > --- a/Documentation/devicetree/bindings/arm/cpus.yaml > +++ b/Documentation/devicetree/bindings/arm/cpus.yaml > @@ -290,6 +290,12 @@ properties: > > * arm/msm/qcom,kpss-acc.txt > > + qcom,freq-domain: > + $ref: '/schemas/types.yaml#/definitions/phandle-array' > + description: | > + CPUs supporting freq-domain must set their "qcom,freq-domain" property > + with phandle to a cpufreq_hw node followed by the Domain ID(0/1). There's no 3 patches doing the same thing. Mediatek and SCMI are the others. This will need to be common. > + > rockchip,pmu: > $ref: '/schemas/types.yaml#/definitions/phandle' > description: | > -- > 2.17.1 >
On Mon 26 Oct 09:32 CDT 2020, Rob Herring wrote: > On Tue, Oct 20, 2020 at 09:09:43PM +0530, Manivannan Sadhasivam wrote: > > Add devicetree documentation for 'qcom,freq-domain' property specific > > to Qualcomm CPUs. This property is used to reference the CPUFREQ node > > along with Domain ID (0/1). > > > > Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> > > --- > > Documentation/devicetree/bindings/arm/cpus.yaml | 6 ++++++ > > 1 file changed, 6 insertions(+) > > > > diff --git a/Documentation/devicetree/bindings/arm/cpus.yaml b/Documentation/devicetree/bindings/arm/cpus.yaml > > index 1222bf1831fa..f40564bf004f 100644 > > --- a/Documentation/devicetree/bindings/arm/cpus.yaml > > +++ b/Documentation/devicetree/bindings/arm/cpus.yaml > > @@ -290,6 +290,12 @@ properties: > > > > * arm/msm/qcom,kpss-acc.txt > > > > + qcom,freq-domain: > > + $ref: '/schemas/types.yaml#/definitions/phandle-array' > > + description: | > > + CPUs supporting freq-domain must set their "qcom,freq-domain" property > > + with phandle to a cpufreq_hw node followed by the Domain ID(0/1). > > There's no 3 patches doing the same thing. Mediatek and SCMI are the > others. This will need to be common. > This property is used by existing dtbs for Qualcomm sdm845, sm8150, sm8250 and sc7180 based devices, so I expect that the support for the existing property will stay. Regards, Bjorn > > + > > rockchip,pmu: > > $ref: '/schemas/types.yaml#/definitions/phandle' > > description: | > > -- > > 2.17.1 > >
On Mon, Oct 26, 2020 at 09:51:08AM -0500, Bjorn Andersson wrote: > On Mon 26 Oct 09:32 CDT 2020, Rob Herring wrote: > > > On Tue, Oct 20, 2020 at 09:09:43PM +0530, Manivannan Sadhasivam wrote: > > > Add devicetree documentation for 'qcom,freq-domain' property specific > > > to Qualcomm CPUs. This property is used to reference the CPUFREQ node > > > along with Domain ID (0/1). > > > > > > Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> > > > --- > > > Documentation/devicetree/bindings/arm/cpus.yaml | 6 ++++++ > > > 1 file changed, 6 insertions(+) > > > > > > diff --git a/Documentation/devicetree/bindings/arm/cpus.yaml b/Documentation/devicetree/bindings/arm/cpus.yaml > > > index 1222bf1831fa..f40564bf004f 100644 > > > --- a/Documentation/devicetree/bindings/arm/cpus.yaml > > > +++ b/Documentation/devicetree/bindings/arm/cpus.yaml > > > @@ -290,6 +290,12 @@ properties: > > > > > > * arm/msm/qcom,kpss-acc.txt > > > > > > + qcom,freq-domain: > > > + $ref: '/schemas/types.yaml#/definitions/phandle-array' > > > + description: | > > > + CPUs supporting freq-domain must set their "qcom,freq-domain" property > > > + with phandle to a cpufreq_hw node followed by the Domain ID(0/1). > > > > There's no 3 patches doing the same thing. Mediatek and SCMI are the > > others. This will need to be common. > > > > This property is used by existing dtbs for Qualcomm sdm845, sm8150, > sm8250 and sc7180 based devices, so I expect that the support for the > existing property will stay. Indeed. Any of these can tolerate a change here? We should still take QCom into account for whatever is come up with for a common binding. Rob
On Wed, Oct 21, 2020 at 04:20:37PM +0530, Viresh Kumar wrote: > On 21-10-20, 15:29, Manivannan Sadhasivam wrote: > > Hi, > > > > On Wed, Oct 21, 2020 at 10:36:43AM +0800, Hector Yuan wrote: > > > Hi, Manivannan > > > > > > On Tue, 2020-10-20 at 21:09 +0530, Manivannan Sadhasivam wrote: > > > > Add devicetree documentation for 'qcom,freq-domain' property specific > > > > to Qualcomm CPUs. This property is used to reference the CPUFREQ node > > > > along with Domain ID (0/1). > > > > > > > > Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> > > > > --- > > > > Documentation/devicetree/bindings/arm/cpus.yaml | 6 ++++++ > > > > 1 file changed, 6 insertions(+) > > > > > > > > diff --git a/Documentation/devicetree/bindings/arm/cpus.yaml b/Documentation/devicetree/bindings/arm/cpus.yaml > > > > index 1222bf1831fa..f40564bf004f 100644 > > > > --- a/Documentation/devicetree/bindings/arm/cpus.yaml > > > > +++ b/Documentation/devicetree/bindings/arm/cpus.yaml > > > > @@ -290,6 +290,12 @@ properties: > > > > > > > > * arm/msm/qcom,kpss-acc.txt > > > > > > > > + qcom,freq-domain: > > > Do you mind to change "qcom, freq-domain" to common naming? or drop the > > > prefix. So that we can use this CPU node and map it to each freq-domain. > > > Thanks a lot. > > > > I can do that but did the domain value match for other platforms as well? > > I am not sure if you can. The code needs to be backward compatible so it can > support all devices shipped with older bootloaders and latest kernels. And so > changing the bindings isn't a good idea normally. It can be done. We'd need to do the following: - schema defines the common property/binding. - The kernel supports both names and that is backported to stable. - Update all the Qcom dts files to the new binding Whether we actually do that or not, I'd like to keep the option open. Aligning the current proposals should be possible. My concern is more about what's the next addition and non-cpu device support. Rob
On Wed, Oct 28, 2020 at 10:46:37AM -0500, Rob Herring wrote: > On Wed, Oct 21, 2020 at 04:20:37PM +0530, Viresh Kumar wrote: > > On 21-10-20, 15:29, Manivannan Sadhasivam wrote: > > > Hi, > > > > > > On Wed, Oct 21, 2020 at 10:36:43AM +0800, Hector Yuan wrote: > > > > Hi, Manivannan > > > > > > > > On Tue, 2020-10-20 at 21:09 +0530, Manivannan Sadhasivam wrote: > > > > > Add devicetree documentation for 'qcom,freq-domain' property specific > > > > > to Qualcomm CPUs. This property is used to reference the CPUFREQ node > > > > > along with Domain ID (0/1). > > > > > > > > > > Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> > > > > > --- > > > > > Documentation/devicetree/bindings/arm/cpus.yaml | 6 ++++++ > > > > > 1 file changed, 6 insertions(+) > > > > > > > > > > diff --git a/Documentation/devicetree/bindings/arm/cpus.yaml b/Documentation/devicetree/bindings/arm/cpus.yaml > > > > > index 1222bf1831fa..f40564bf004f 100644 > > > > > --- a/Documentation/devicetree/bindings/arm/cpus.yaml > > > > > +++ b/Documentation/devicetree/bindings/arm/cpus.yaml > > > > > @@ -290,6 +290,12 @@ properties: > > > > > > > > > > * arm/msm/qcom,kpss-acc.txt > > > > > > > > > > + qcom,freq-domain: > > > > Do you mind to change "qcom, freq-domain" to common naming? or drop the > > > > prefix. So that we can use this CPU node and map it to each freq-domain. > > > > Thanks a lot. > > > > > > I can do that but did the domain value match for other platforms as well? > > > > I am not sure if you can. The code needs to be backward compatible so it can > > support all devices shipped with older bootloaders and latest kernels. And so > > changing the bindings isn't a good idea normally. > > It can be done. We'd need to do the following: > > - schema defines the common property/binding. > - The kernel supports both names and that is backported to stable. > - Update all the Qcom dts files to the new binding > > Whether we actually do that or not, I'd like to keep the option open. > Aligning the current proposals should be possible. My concern is more > about what's the next addition and non-cpu device support. > In the meantime can we get this series merged? Thanks, Mani > Rob
diff --git a/Documentation/devicetree/bindings/arm/cpus.yaml b/Documentation/devicetree/bindings/arm/cpus.yaml index 1222bf1831fa..f40564bf004f 100644 --- a/Documentation/devicetree/bindings/arm/cpus.yaml +++ b/Documentation/devicetree/bindings/arm/cpus.yaml @@ -290,6 +290,12 @@ properties: * arm/msm/qcom,kpss-acc.txt + qcom,freq-domain: + $ref: '/schemas/types.yaml#/definitions/phandle-array' + description: | + CPUs supporting freq-domain must set their "qcom,freq-domain" property + with phandle to a cpufreq_hw node followed by the Domain ID(0/1). + rockchip,pmu: $ref: '/schemas/types.yaml#/definitions/phandle' description: |
Add devicetree documentation for 'qcom,freq-domain' property specific to Qualcomm CPUs. This property is used to reference the CPUFREQ node along with Domain ID (0/1). Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> --- Documentation/devicetree/bindings/arm/cpus.yaml | 6 ++++++ 1 file changed, 6 insertions(+)