From patchwork Thu Apr 7 07:17:07 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Claudiu Beznea X-Patchwork-Id: 12804533 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BD788C433EF for ; Thu, 7 Apr 2022 07:16:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241568AbiDGHSM (ORCPT ); Thu, 7 Apr 2022 03:18:12 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51730 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241639AbiDGHR3 (ORCPT ); Thu, 7 Apr 2022 03:17:29 -0400 Received: from esa.microchip.iphmx.com (esa.microchip.iphmx.com [68.232.154.123]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DE0F815609D; Thu, 7 Apr 2022 00:15:29 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1649315731; x=1680851731; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=1Bi4lSLV0zLBBZOD2CzxtM5qbY8InuCSGS8Woi7tp1Q=; b=QlWFiuWa4eXJ7i/HoZynivrLvU/7wI4vOMzFftCBUcM/ch+Vx1+dqi+r J6nOMuXjVckJjZeGR28R2xmOhRYK3SOGPFp/h7s7Q8yc6WylVW+QFZvNL s/JiRcMKxYVbBJxFpE04iqQujlOTm0F0xhZCyGX1Qz2fR8f9yrOazEp0n KbCLTPYYVZTaw2hcPIfvtbv2c0aCRGlC8D3aO25nqRptuNk678sdkQE2P 6Fk8sMPMA4WlLaA+fnkzaE6tmAy3rXu3UekuealT4COpEt+Uwfd0/e/zG pF19GROqePJxJolZd/1EsaZcM9mtG+cIi+HmhQ7jda16lT9s3sFmMni6H w==; X-IronPort-AV: E=Sophos;i="5.90,241,1643698800"; d="scan'208";a="151841505" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa4.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 07 Apr 2022 00:15:30 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.85.144) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.17; Thu, 7 Apr 2022 00:15:28 -0700 Received: from localhost.localdomain (10.10.115.15) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2375.17 via Frontend Transport; Thu, 7 Apr 2022 00:15:26 -0700 From: Claudiu Beznea To: , , , , , , , , CC: , Claudiu Beznea Subject: [PATCH v2 09/10] ARM: dts: at91: sama7g5: add reset-controller node Date: Thu, 7 Apr 2022 10:17:07 +0300 Message-ID: <20220407071708.3848812-10-claudiu.beznea@microchip.com> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20220407071708.3848812-1-claudiu.beznea@microchip.com> References: <20220407071708.3848812-1-claudiu.beznea@microchip.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org Add reset controller node. Signed-off-by: Claudiu Beznea --- arch/arm/boot/dts/sama7g5.dtsi | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/arm/boot/dts/sama7g5.dtsi b/arch/arm/boot/dts/sama7g5.dtsi index eddcfbf4d223..aa0e72d4d2d5 100644 --- a/arch/arm/boot/dts/sama7g5.dtsi +++ b/arch/arm/boot/dts/sama7g5.dtsi @@ -122,6 +122,13 @@ pmc: pmc@e0018000 { clock-names = "td_slck", "md_slck", "main_xtal"; }; + reset_controller: reset-controller@e001d000 { + compatible = "microchip,sama7g5-rstc"; + reg = <0xe001d000 0xc>, <0xe001d0e4 0x4>; + #reset-cells = <1>; + clocks = <&clk32k 0>; + }; + shdwc: shdwc@e001d010 { compatible = "microchip,sama7g5-shdwc", "syscon"; reg = <0xe001d010 0x10>;