From patchwork Fri Apr 8 04:58:54 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?UmV4LUJDIENoZW4gKOmZs+afj+i+sCk=?= X-Patchwork-Id: 12806074 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 46C0AC433EF for ; Fri, 8 Apr 2022 04:59:40 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234429AbiDHFBa (ORCPT ); Fri, 8 Apr 2022 01:01:30 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38580 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234348AbiDHFB0 (ORCPT ); Fri, 8 Apr 2022 01:01:26 -0400 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C168119CCF2; Thu, 7 Apr 2022 21:59:19 -0700 (PDT) X-UUID: 210add2c37294a8a9caaac441fe80976-20220408 X-UUID: 210add2c37294a8a9caaac441fe80976-20220408 Received: from mtkmbs10n2.mediatek.inc [(172.21.101.183)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1338223658; Fri, 08 Apr 2022 12:59:12 +0800 Received: from mtkexhb02.mediatek.inc (172.21.101.103) by mtkmbs07n1.mediatek.inc (172.21.101.16) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Fri, 8 Apr 2022 12:59:11 +0800 Received: from mtkcas11.mediatek.inc (172.21.101.40) by mtkexhb02.mediatek.inc (172.21.101.103) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Fri, 8 Apr 2022 12:59:10 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas11.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Fri, 8 Apr 2022 12:59:10 +0800 From: Rex-BC Chen To: , , , CC: , , , , , , , , , , Rex-BC Chen Subject: [PATCH V2 01/15] dt-bindings: cpufreq: mediatek: Add MediaTek CCI property Date: Fri, 8 Apr 2022 12:58:54 +0800 Message-ID: <20220408045908.21671-2-rex-bc.chen@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20220408045908.21671-1-rex-bc.chen@mediatek.com> References: <20220408045908.21671-1-rex-bc.chen@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org From: Jia-Wei Chang MediaTek Cache Coherent Interconnect (CCI) uses software devfreq module for scaling clock frequency and adjust voltage. The phandle could be linked between CPU and MediaTek CCI for some MediaTek SoCs, like MT8183 and MT8186. Therefore, we add this property in cpufreq-mediatek.txt. Signed-off-by: Jia-Wei Chang Signed-off-by: Rex-BC Chen --- .../devicetree/bindings/cpufreq/cpufreq-mediatek.txt | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek.txt b/Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek.txt index b8233ec91d3d..d1b3d430c25c 100644 --- a/Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek.txt +++ b/Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek.txt @@ -20,6 +20,10 @@ Optional properties: Vsram to fit SoC specific needs. When absent, the voltage scaling flow is handled by hardware, hence no software "voltage tracking" is needed. +- cci: MediaTek Cache Coherent Interconnect uses software devfreq module for scaling + clock frequency and adjust voltage. + For details, please refer to + Documentation/devicetree/bindings/devfreq/mtk-cci.yaml - #cooling-cells: For details, please refer to Documentation/devicetree/bindings/thermal/thermal-cooling-devices.yaml