From patchwork Tue May 17 01:36:06 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: qianfan X-Patchwork-Id: 12851814 X-Patchwork-Delegate: daniel.lezcano@linaro.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4B7C4C433EF for ; Tue, 17 May 2022 02:24:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233914AbiEQCYJ (ORCPT ); Mon, 16 May 2022 22:24:09 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36640 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229553AbiEQCYE (ORCPT ); Mon, 16 May 2022 22:24:04 -0400 Received: from m12-13.163.com (m12-13.163.com [220.181.12.13]) by lindbergh.monkeyblade.net (Postfix) with ESMTP id 4B9E53D1FC; Mon, 16 May 2022 19:24:02 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=163.com; s=s110527; h=From:Subject:Date:Message-Id:MIME-Version; bh=lTBhx p2EfVojczwDke4E/Onuf36SXf/m+vxj1MMdS2Y=; b=K6NlZ9QpriWOehObiwcCW pE3iFoBEuRVoIUNkpmAnABQTWS8xwo6jXXfDwuQ5jbHAhPGifkxC5uTlGvPQuGiy kUsAAnQ9eT0171ARPVgOufstlCt9tFJLy0bZgjlR45aNrDd9IDvSeFkNoFonE878 KrJ3CCaBcKTwmrhIejxA8A= Received: from DESKTOP-B1R4FVG.localdomain (unknown [218.201.129.20]) by smtp9 (Coremail) with SMTP id DcCowAB3USwR_IJiF3ohDQ--.61255S4; Tue, 17 May 2022 09:36:19 +0800 (CST) From: qianfanguijin@163.com To: linux-sunxi@lists.linux.dev Cc: Rob Herring , Maxime Ripard , Chen-Yu Tsai , Jernej Skrabec , "Rafael J . Wysocki" , Viresh Kumar , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, qianfan Zhao Subject: [PATCH v5 2/3] ARM: dts: sun8i-r40: add opp table for cpu Date: Tue, 17 May 2022 09:36:06 +0800 Message-Id: <20220517013607.2252-3-qianfanguijin@163.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220517013607.2252-1-qianfanguijin@163.com> References: <20220517013607.2252-1-qianfanguijin@163.com> MIME-Version: 1.0 X-CM-TRANSID: DcCowAB3USwR_IJiF3ohDQ--.61255S4 X-Coremail-Antispam: 1Uf129KBjvJXoWxGrWxXF1UKw4xur17Xry5urg_yoWrZFy8pw 17Zr4kGrs7Wr1Yq342gry8KF18uFWv9F4Yyry5C348Jrn7X34DJr97tr9akrWDXr43X3yI 9Fs5Xr9rtw1DZaDanT9S1TB71UUUUUUqnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2 9KBjDUYxBIdaVFxhVjvjDU0xZFpf9x07Ubo7tUUUUU= X-Originating-IP: [218.201.129.20] X-CM-SenderInfo: htld0w5dqj3xxmlqqiywtou0bp/1tbiQhQE7VaECXNrTAAAsw Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org From: qianfan Zhao OPP table value is get from allwinner lichee linux-3.10 kernel driver Signed-off-by: qianfan Zhao Reviewed-by: Samuel Holland Tested-by: Samuel Holland --- .../boot/dts/sun8i-r40-bananapi-m2-ultra.dts | 1 + arch/arm/boot/dts/sun8i-r40-cpu-opp.dtsi | 52 +++++++++++++++++++ arch/arm/boot/dts/sun8i-r40-feta40i.dtsi | 1 + arch/arm/boot/dts/sun8i-r40.dtsi | 8 +++ arch/arm/boot/dts/sun8i-t3-cqa3t-bv3.dts | 1 + .../boot/dts/sun8i-v40-bananapi-m2-berry.dts | 1 + 6 files changed, 64 insertions(+) create mode 100644 arch/arm/boot/dts/sun8i-r40-cpu-opp.dtsi diff --git a/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts b/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts index 4f30018ec4a2..28197bbcb1d5 100644 --- a/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts +++ b/arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts @@ -43,6 +43,7 @@ /dts-v1/; #include "sun8i-r40.dtsi" +#include "sun8i-r40-cpu-opp.dtsi" #include diff --git a/arch/arm/boot/dts/sun8i-r40-cpu-opp.dtsi b/arch/arm/boot/dts/sun8i-r40-cpu-opp.dtsi new file mode 100644 index 000000000000..4faa22d3bac8 --- /dev/null +++ b/arch/arm/boot/dts/sun8i-r40-cpu-opp.dtsi @@ -0,0 +1,52 @@ +/{ + cpu0_opp_table: opp_table0 { + compatible = "operating-points-v2"; + opp-shared; + + opp-720000000 { + opp-hz = /bits/ 64 <720000000>; + opp-microvolt = <1000000 1000000 1300000>; + clock-latency-ns = <2000000>; + }; + + opp-912000000 { + opp-hz = /bits/ 64 <912000000>; + opp-microvolt = <1100000 1100000 1300000>; + clock-latency-ns = <2000000>; + }; + + opp-1008000000 { + opp-hz = /bits/ 64 <1008000000>; + opp-microvolt = <1160000 1160000 1300000>; + clock-latency-ns = <2000000>; + }; + + opp-1104000000 { + opp-hz = /bits/ 64 <1104000000>; + opp-microvolt = <1240000 1240000 1300000>; + clock-latency-ns = <2000000>; + }; + + opp-1200000000 { + opp-hz = /bits/ 64 <1200000000>; + opp-microvolt = <1300000 1300000 1300000>; + clock-latency-ns = <2000000>; + }; + }; +}; + +&cpu0 { + operating-points-v2 = <&cpu0_opp_table>; +}; + +&cpu1 { + operating-points-v2 = <&cpu0_opp_table>; +}; + +&cpu2 { + operating-points-v2 = <&cpu0_opp_table>; +}; + +&cpu3 { + operating-points-v2 = <&cpu0_opp_table>; +}; diff --git a/arch/arm/boot/dts/sun8i-r40-feta40i.dtsi b/arch/arm/boot/dts/sun8i-r40-feta40i.dtsi index b872b51a346d..9f39b5a2bb35 100644 --- a/arch/arm/boot/dts/sun8i-r40-feta40i.dtsi +++ b/arch/arm/boot/dts/sun8i-r40-feta40i.dtsi @@ -5,6 +5,7 @@ // Copyright (C) 2017 Icenowy Zheng #include "sun8i-r40.dtsi" +#include "sun8i-r40-cpu-opp.dtsi" &cpu0 { cpu-supply = <®_dcdc2>; diff --git a/arch/arm/boot/dts/sun8i-r40.dtsi b/arch/arm/boot/dts/sun8i-r40.dtsi index 291f4784e86c..ae2a5ebd9924 100644 --- a/arch/arm/boot/dts/sun8i-r40.dtsi +++ b/arch/arm/boot/dts/sun8i-r40.dtsi @@ -84,24 +84,32 @@ cpu0: cpu@0 { compatible = "arm,cortex-a7"; device_type = "cpu"; reg = <0>; + clocks = <&ccu CLK_CPU>; + clock-names = "cpu"; }; cpu1: cpu@1 { compatible = "arm,cortex-a7"; device_type = "cpu"; reg = <1>; + clocks = <&ccu CLK_CPU>; + clock-names = "cpu"; }; cpu2: cpu@2 { compatible = "arm,cortex-a7"; device_type = "cpu"; reg = <2>; + clocks = <&ccu CLK_CPU>; + clock-names = "cpu"; }; cpu3: cpu@3 { compatible = "arm,cortex-a7"; device_type = "cpu"; reg = <3>; + clocks = <&ccu CLK_CPU>; + clock-names = "cpu"; }; }; diff --git a/arch/arm/boot/dts/sun8i-t3-cqa3t-bv3.dts b/arch/arm/boot/dts/sun8i-t3-cqa3t-bv3.dts index 0eb1990742ff..9f472521f4a4 100644 --- a/arch/arm/boot/dts/sun8i-t3-cqa3t-bv3.dts +++ b/arch/arm/boot/dts/sun8i-t3-cqa3t-bv3.dts @@ -45,6 +45,7 @@ /dts-v1/; #include "sun8i-r40.dtsi" +#include "sun8i-r40-cpu-opp.dtsi" #include diff --git a/arch/arm/boot/dts/sun8i-v40-bananapi-m2-berry.dts b/arch/arm/boot/dts/sun8i-v40-bananapi-m2-berry.dts index fdf8bd12faaa..434871040aca 100644 --- a/arch/arm/boot/dts/sun8i-v40-bananapi-m2-berry.dts +++ b/arch/arm/boot/dts/sun8i-v40-bananapi-m2-berry.dts @@ -42,6 +42,7 @@ /dts-v1/; #include "sun8i-r40.dtsi" +#include "sun8i-r40-cpu-opp.dtsi" #include