From patchwork Tue Oct 25 19:15:13 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bryan Brattlof X-Patchwork-Id: 13019786 X-Patchwork-Delegate: daniel.lezcano@linaro.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E58C0FA3742 for ; Tue, 25 Oct 2022 19:15:38 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232667AbiJYTPh (ORCPT ); Tue, 25 Oct 2022 15:15:37 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57712 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232334AbiJYTPd (ORCPT ); Tue, 25 Oct 2022 15:15:33 -0400 Received: from fllv0016.ext.ti.com (fllv0016.ext.ti.com [198.47.19.142]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B64197F0B2; Tue, 25 Oct 2022 12:15:32 -0700 (PDT) Received: from fllv0034.itg.ti.com ([10.64.40.246]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 29PJFKn3112029; Tue, 25 Oct 2022 14:15:20 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1666725320; bh=zrG9w02JnVRZZt0ciyWlc0+Fr/UocYsC+JZnx4gz+Fc=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=wCHuM6dP+cJnJcwXMZLRihVcowvvTixFQFo3QNzmKjlnecx7RHzaGj8wcxECu6+yL eSYZdNNgSbiExsJL6RNefTKP7qPBAlCh9wJ0kbo1HT/f0Hmfys9w+S4QvPkeOe2VPk 4UYjAKArx0RKpz7U5+XZIaQVZIo6VgtpoP/3LLio= Received: from DLEE115.ent.ti.com (dlee115.ent.ti.com [157.170.170.26]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 29PJFKQQ082963 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 25 Oct 2022 14:15:20 -0500 Received: from DLEE107.ent.ti.com (157.170.170.37) by DLEE115.ent.ti.com (157.170.170.26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.6; Tue, 25 Oct 2022 14:15:19 -0500 Received: from fllv0040.itg.ti.com (10.64.41.20) by DLEE107.ent.ti.com (157.170.170.37) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.6 via Frontend Transport; Tue, 25 Oct 2022 14:15:19 -0500 Received: from localhost (ileaxei01-snat.itg.ti.com [10.180.69.5]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id 29PJFJj6018069; Tue, 25 Oct 2022 14:15:19 -0500 From: Bryan Brattlof To: "Rafael J. Wysocki" , Daniel Lezcano , Amit Kucheria , Zhang Rui , Rob Herring , Krzysztof Kozlowski , Nishanth Menon , Vignesh Raghavendra , Tero Kristo CC: Keerthy , Linux PM , Device Trees , LKML , LKML ARM , Bryan Brattlof Subject: [PATCH v2 09/11] arm64: dts: ti: k3-j721e-mcu-wakeup: add VTM node Date: Tue, 25 Oct 2022 14:15:13 -0500 Message-ID: <20221025191515.9151-10-bb@ti.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221025191515.9151-1-bb@ti.com> References: <20221025191515.9151-1-bb@ti.com> MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=3842; h=from:subject; bh=vlkzNaHkJyVHTvJvk+O1jhmqXAYXIkCfkx3XmZoRK9Y=; b=owNCWmg5MUFZJlNZlGxQMQAAaf///n//2+Hs617vfv3e+1M/z/+n+wf22fe//uv/qTvz/26wARmY IeoHqDIGgNGgGgBoDT1NDNQAAA0AA0A0AaAAANAAAA0yNDQ9T1PUyGZNNRABoBkaMgDCADE0ADQ000 0AaA9QDENAHqeoAMJ6gNpAAGmTygDIA0GjQDHIaDJpp6RoAGgDQDIGTTRk0aDQNNAAAaNNGRhNBoDQ GjEDEMIaBgQDTQaACBN8LWywZ7xnkQZfgO+YtLOSfDAAwPfwQAI52A4vnP59xFU2kmjfdNBqsvgbA2 REkPleJZNk4kavDOdXZIpeg+Y0C1EqEREK70DSG6pH9Z20yNY44Lz22KX2nF32TMhMuOfGEDY5vbQh LQIpQDLgMeFEKrvNRLZMFSrcJK2rHxlPOv4HQSP3WA/IXIqpMF2CqbHWyxmffSO2dWRd3TZ+wCDcRC FtoumaD8F7ynSBrjrPEG0nEX3xZmjBPVJtTxDjphTCB+VTi3COGhwzKIt7dxkuxQRpUl9EC8AIS9hk KdR8EZ/gItGEfdGDUUeTCK9NYpIkwkNaCyJ9LA8aI9D+ZWx8jLq95SNovuKwUcu6s2XD1GRfxBs4AH bI6oYDnaAjC9cuD6gGBP2KRL05X5yYxJ06QCmVl64tvYLWlPk2IDAlJQ7SMor/F3JFOFCQlGxQMQ== X-Developer-Key: i=bb@ti.com; a=openpgp; fpr=D3D177E40A38DF4D1853FEEF41B90D5D71D56CE0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org The j721e supports a single Voltage and Thermal Management (VTM) module located in the wakeup domain with five associated temperature monitors located in various hot spots on the die. Signed-off-by: Bryan Brattlof --- .../boot/dts/ti/k3-j721e-mcu-wakeup.dtsi | 9 +++ arch/arm64/boot/dts/ti/k3-j721e-thermal.dtsi | 75 +++++++++++++++++++ arch/arm64/boot/dts/ti/k3-j721e.dtsi | 3 + 3 files changed, 87 insertions(+) create mode 100644 arch/arm64/boot/dts/ti/k3-j721e-thermal.dtsi diff --git a/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi index df08724bbf1c5..9a09f66c51c01 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi @@ -418,4 +418,13 @@ mcu_mcan1: can@40568000 { interrupt-names = "int0", "int1"; bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>; }; + + vtm0: temperature-sensor@42040000 { + compatible = "ti,j721e-vtm"; + reg = <0x00 0x42040000 0x00 0x350>, + <0x00 0x42050000 0x00 0x350>, + <0x00 0x43000300 0x00 0x10>; + power-domains = <&k3_pds 154 TI_SCI_PD_EXCLUSIVE>; + #thermal-sensor-cells = <1>; + }; }; diff --git a/arch/arm64/boot/dts/ti/k3-j721e-thermal.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-thermal.dtsi new file mode 100644 index 0000000000000..79641927a9092 --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-j721e-thermal.dtsi @@ -0,0 +1,75 @@ +// SPDX-License-Identifier: GPL-2.0 + +#include + +thermal_zones: thermal-zones { + wkup_thermal: wkup-thermal { + polling-delay-passive = <250>; /* milliSeconds */ + polling-delay = <500>; /* milliSeconds */ + thermal-sensors = <&vtm0 0>; + + trips { + wkup_crit: wkup-crit { + temperature = <125000>; /* milliCelsius */ + hysteresis = <2000>; /* milliCelsius */ + type = "critical"; + }; + }; + }; + + mpu_thermal: mpu-thermal { + polling-delay-passive = <250>; /* milliSeconds */ + polling-delay = <500>; /* milliSeconds */ + thermal-sensors = <&vtm0 1>; + + trips { + mpu_crit: mpu-crit { + temperature = <125000>; /* milliCelsius */ + hysteresis = <2000>; /* milliCelsius */ + type = "critical"; + }; + }; + }; + + c7x_thermal: c7x-thermal { + polling-delay-passive = <250>; /* milliSeconds */ + polling-delay = <500>; /* milliSeconds */ + thermal-sensors = <&vtm0 2>; + + trips { + c7x_crit: c7x-crit { + temperature = <125000>; /* milliCelsius */ + hysteresis = <2000>; /* milliCelsius */ + type = "critical"; + }; + }; + }; + + gpu_thermal: gpu-thermal { + polling-delay-passive = <250>; /* milliSeconds */ + polling-delay = <500>; /* milliSeconds */ + thermal-sensors = <&vtm0 3>; + + trips { + gpu_crit: gpu-crit { + temperature = <125000>; /* milliCelsius */ + hysteresis = <2000>; /* milliCelsius */ + type = "critical"; + }; + }; + }; + + r5f_thermal: r5f-thermal { + polling-delay-passive = <250>; /* milliSeconds */ + polling-delay = <500>; /* milliSeconds */ + thermal-sensors = <&vtm0 4>; + + trips { + r5f_crit: r5f-crit { + temperature = <125000>; /* milliCelsius */ + hysteresis = <2000>; /* milliCelsius */ + type = "critical"; + }; + }; + }; +}; diff --git a/arch/arm64/boot/dts/ti/k3-j721e.dtsi b/arch/arm64/boot/dts/ti/k3-j721e.dtsi index 0e23886c9fd1d..cfab10e2455c4 100644 --- a/arch/arm64/boot/dts/ti/k3-j721e.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j721e.dtsi @@ -181,6 +181,9 @@ cbass_mcu_wakeup: bus@28380000 { <0x07 0x00000000 0x07 0x00000000 0x01 0x00000000>; /* FSS OSPI1 data region 3*/ }; }; + + #include "k3-j721e-thermal.dtsi" + }; /* Now include the peripherals for each bus segments */