From patchwork Fri Aug 18 08:43:18 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Martin Botka X-Patchwork-Id: 13357479 X-Patchwork-Delegate: daniel.lezcano@linaro.org Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6556CC71136 for ; Fri, 18 Aug 2023 08:53:14 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1358780AbjHRIwl (ORCPT ); Fri, 18 Aug 2023 04:52:41 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56188 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1358826AbjHRIwX (ORCPT ); Fri, 18 Aug 2023 04:52:23 -0400 X-Greylist: delayed 525 seconds by postgrey-1.37 at lindbergh.monkeyblade.net; Fri, 18 Aug 2023 01:52:19 PDT Received: from m-r2.th.seeweb.it (m-r2.th.seeweb.it [IPv6:2001:4b7a:2000:18::171]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C443F3A96 for ; Fri, 18 Aug 2023 01:52:19 -0700 (PDT) Received: from v0.lan (bband-dyn221.178-41-211.t-com.sk [178.41.211.221]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by m-r2.th.seeweb.it (Postfix) with ESMTPSA id E6F873F48D; Fri, 18 Aug 2023 10:43:32 +0200 (CEST) From: Martin Botka Date: Fri, 18 Aug 2023 10:43:18 +0200 Subject: [PATCH 3/3] arm64: dts: allwinner: h616: Add thermal sensor and thermal zones MIME-Version: 1.0 Message-Id: <20230818-ths-h616-v1-3-0e1e058b9c7a@somainline.org> References: <20230818-ths-h616-v1-0-0e1e058b9c7a@somainline.org> In-Reply-To: <20230818-ths-h616-v1-0-0e1e058b9c7a@somainline.org> To: Vasily Khoruzhick , Yangtao Li , "Rafael J. Wysocki" , Daniel Lezcano , Amit Kucheria , Zhang Rui , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland Cc: linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, Andre Przywara , Alan Ma , Luke Harrison , Marijn Suijten , AngeloGioacchino Del Regno , Konrad Dybcio , Martin Botka , Martin Botka X-Mailer: b4 0.12.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1692348210; l=3135; i=martin.botka@somainline.org; s=20230811; h=from:subject:message-id; bh=Y5wSSzIWuOFKSGGZMNJjnzIykv3kiku+VUt8NVG55u0=; b=ZBj2B90TGub9dkcGVPwHS8atUkCY5zocGk72YKQqCY0wv2P3VsP7A/dCK8pQN74tOcBu4gJiO 0S1fnyvB57dBiSijGDFjzbvZKbaIIzFS7rAGE4m0VgMRWD7yR2d8RY3 X-Developer-Key: i=martin.botka@somainline.org; a=ed25519; pk=aTCd3jmwU8GrJidWg3DSKLpdVMcpFzXzCSLXLR6NtWU= Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org There are 4 thermal sensors: - CPU - GPU - VE - DRAM Add the thermal sensor configuration and thermal zones Signed-off-by: Martin Botka --- arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi | 87 ++++++++++++++++++++++++++ 1 file changed, 87 insertions(+) diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi index d549d277d972..063db9634e5f 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi @@ -9,6 +9,7 @@ #include #include #include +#include / { interrupt-parent = <&gic>; @@ -138,6 +139,10 @@ sid: efuse@3006000 { reg = <0x03006000 0x1000>; #address-cells = <1>; #size-cells = <1>; + + ths_calibration: thermal-sensor-calibration@14 { + reg = <0x14 0x8>; + }; }; watchdog: watchdog@30090a0 { @@ -511,6 +516,18 @@ mdio0: mdio { }; }; + ths: thermal-sensor@5070400 { + compatible = "allwinner,sun50i-h616-ths"; + reg = <0x05070400 0x400>; + interrupts = ; + clocks = <&ccu CLK_BUS_THS>; + clock-names = "bus"; + resets = <&ccu RST_BUS_THS>; + nvmem-cells = <&ths_calibration>; + nvmem-cell-names = "calibration"; + #thermal-sensor-cells = <1>; + }; + usbotg: usb@5100000 { compatible = "allwinner,sun50i-h616-musb", "allwinner,sun8i-h3-musb"; @@ -755,4 +772,74 @@ r_rsb: rsb@7083000 { #size-cells = <0>; }; }; + + thermal-zones { + cpu-thermal { + polling-delay-passive = <500>; + polling-delay = <1000>; + thermal-sensors = <&ths 2>; + sustainable-power = <1000>; + + trips { + cpu_threshold: cpu-trip-0 { + temperature = <60000>; + type = "passive"; + hysteresis = <0>; + }; + cpu_target: cpu-trip-1 { + temperature = <70000>; + type = "passive"; + hysteresis = <0>; + }; + cpu_critical: cpu-trip-2 { + temperature = <110000>; + type = "critical"; + hysteresis = <0>; + }; + }; + }; + + gpu-thermal { + polling-delay-passive = <500>; + polling-delay = <1000>; + thermal-sensors = <&ths 0>; + sustainable-power = <1100>; + + trips { + gpu_temp_critical: gpu-trip-0 { + temperature = <110000>; + type = "critical"; + hysteresis = <0>; + }; + }; + }; + + ve-thermal { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-sensors = <&ths 1>; + + trips { + ve_temp_critical: ve-trip-0 { + temperature = <110000>; + type = "critical"; + hysteresis = <0>; + }; + }; + }; + + ddr-thermal { + polling-delay-passive = <0>; + polling-delay = <0>; + thermal-sensors = <&ths 3>; + + trips { + ddr_temp_critical: ddr-trip-0 { + temperature = <110000>; + type = "critical"; + hysteresis = <0>; + }; + }; + }; + }; };