| Message ID | 20230908064427.26999-2-quic_tengfan@quicinc.com (mailing list archive) |
|---|---|
| State | Handled Elsewhere, archived |
| Headers | show |
| Series | interconnect: qcom: Add SM4450 interconnect driver | expand |
On Fri, 08 Sep 2023 14:44:25 +0800, Tengfei Fan wrote: > The Qualcomm SM4450 SoC has several bus fabrics that could be controlled > and tuned dynamically according to the bandwidth demand. > > Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com> > --- > .../interconnect/qcom,sm4450-rpmh.yaml | 133 ++++++++++++++ > .../dt-bindings/interconnect/qcom,sm4450.h | 163 ++++++++++++++++++ > 2 files changed, 296 insertions(+) > create mode 100644 Documentation/devicetree/bindings/interconnect/qcom,sm4450-rpmh.yaml > create mode 100644 include/dt-bindings/interconnect/qcom,sm4450.h > My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check' on your patch (DT_CHECKER_FLAGS is new in v5.13): yamllint warnings/errors: dtschema/dtc warnings/errors: Documentation/devicetree/bindings/interconnect/qcom,sm4450-rpmh.example.dts:18:18: fatal error: dt-bindings/clock/qcom,gcc-sm4450.h: No such file or directory 18 | #include <dt-bindings/clock/qcom,gcc-sm4450.h> | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ compilation terminated. make[2]: *** [scripts/Makefile.lib:419: Documentation/devicetree/bindings/interconnect/qcom,sm4450-rpmh.example.dtb] Error 1 make[2]: *** Waiting for unfinished jobs.... make[1]: *** [/builds/robherring/dt-review-ci/linux/Makefile:1500: dt_binding_check] Error 2 make: *** [Makefile:234: __sub-make] Error 2 doc reference errors (make refcheckdocs): See https://patchwork.ozlabs.org/project/devicetree-bindings/patch/20230908064427.26999-2-quic_tengfan@quicinc.com The base for the series is generally the latest rc1. A different dependency should be noted in *this* patch. If you already ran 'make dt_binding_check' and didn't see the above error(s), then make sure 'yamllint' is installed and dt-schema is up to date: pip3 install dtschema --upgrade Please check and re-submit after running the above command yourself. Note that DT_SCHEMA_FILES can be set to your schema file to speed up checking your schema. However, it must be unset to test all examples with your schema.
在 9/8/2023 3:42 PM, Rob Herring 写道: > > On Fri, 08 Sep 2023 14:44:25 +0800, Tengfei Fan wrote: >> The Qualcomm SM4450 SoC has several bus fabrics that could be controlled >> and tuned dynamically according to the bandwidth demand. >> >> Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com> >> --- >> .../interconnect/qcom,sm4450-rpmh.yaml | 133 ++++++++++++++ >> .../dt-bindings/interconnect/qcom,sm4450.h | 163 ++++++++++++++++++ >> 2 files changed, 296 insertions(+) >> create mode 100644 Documentation/devicetree/bindings/interconnect/qcom,sm4450-rpmh.yaml >> create mode 100644 include/dt-bindings/interconnect/qcom,sm4450.h >> > > My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check' > on your patch (DT_CHECKER_FLAGS is new in v5.13): > > yamllint warnings/errors: > > dtschema/dtc warnings/errors: > Documentation/devicetree/bindings/interconnect/qcom,sm4450-rpmh.example.dts:18:18: fatal error: dt-bindings/clock/qcom,gcc-sm4450.h: No such file or directory > 18 | #include <dt-bindings/clock/qcom,gcc-sm4450.h> > | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ > compilation terminated. > make[2]: *** [scripts/Makefile.lib:419: Documentation/devicetree/bindings/interconnect/qcom,sm4450-rpmh.example.dtb] Error 1 > make[2]: *** Waiting for unfinished jobs.... > make[1]: *** [/builds/robherring/dt-review-ci/linux/Makefile:1500: dt_binding_check] Error 2 > make: *** [Makefile:234: __sub-make] Error 2 > > doc reference errors (make refcheckdocs): > > See https://patchwork.ozlabs.org/project/devicetree-bindings/patch/20230908064427.26999-2-quic_tengfan@quicinc.com > > The base for the series is generally the latest rc1. A different dependency > should be noted in *this* patch. > > If you already ran 'make dt_binding_check' and didn't see the above > error(s), then make sure 'yamllint' is installed and dt-schema is up to > date: > > pip3 install dtschema --upgrade > > Please check and re-submit after running the above command yourself. Note > that DT_SCHEMA_FILES can be set to your schema file to speed up checking > your schema. However, it must be unset to test all examples with your schema. > Thanks review this patch, will setup new env for verify again.
在 9/8/2023 4:25 PM, Tengfei Fan 写道: > > > 在 9/8/2023 3:42 PM, Rob Herring 写道: >> >> On Fri, 08 Sep 2023 14:44:25 +0800, Tengfei Fan wrote: >>> The Qualcomm SM4450 SoC has several bus fabrics that could be controlled >>> and tuned dynamically according to the bandwidth demand. >>> >>> Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com> >>> --- >>> .../interconnect/qcom,sm4450-rpmh.yaml | 133 ++++++++++++++ >>> .../dt-bindings/interconnect/qcom,sm4450.h | 163 ++++++++++++++++++ >>> 2 files changed, 296 insertions(+) >>> create mode 100644 >>> Documentation/devicetree/bindings/interconnect/qcom,sm4450-rpmh.yaml >>> create mode 100644 include/dt-bindings/interconnect/qcom,sm4450.h >>> >> >> My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check' >> on your patch (DT_CHECKER_FLAGS is new in v5.13): >> >> yamllint warnings/errors: >> >> dtschema/dtc warnings/errors: >> Documentation/devicetree/bindings/interconnect/qcom,sm4450-rpmh.example.dts:18:18: fatal error: dt-bindings/clock/qcom,gcc-sm4450.h: No such file or directory >> 18 | #include <dt-bindings/clock/qcom,gcc-sm4450.h> >> | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ >> compilation terminated. >> make[2]: *** [scripts/Makefile.lib:419: >> Documentation/devicetree/bindings/interconnect/qcom,sm4450-rpmh.example.dtb] Error 1 >> make[2]: *** Waiting for unfinished jobs.... >> make[1]: *** [/builds/robherring/dt-review-ci/linux/Makefile:1500: >> dt_binding_check] Error 2 >> make: *** [Makefile:234: __sub-make] Error 2 >> >> doc reference errors (make refcheckdocs): >> >> See >> https://patchwork.ozlabs.org/project/devicetree-bindings/patch/20230908064427.26999-2-quic_tengfan@quicinc.com >> >> The base for the series is generally the latest rc1. A different >> dependency >> should be noted in *this* patch. >> >> If you already ran 'make dt_binding_check' and didn't see the above >> error(s), then make sure 'yamllint' is installed and dt-schema is up to >> date: >> >> pip3 install dtschema --upgrade >> >> Please check and re-submit after running the above command yourself. Note >> that DT_SCHEMA_FILES can be set to your schema file to speed up checking >> your schema. However, it must be unset to test all examples with your >> schema. >> > Thanks review this patch, will setup new env for verify again. > this error is due to have dependence with: https://lore.kernel.org/linux-arm-msm/20230824173410.550126-1-quic_ajipan@quicinc.com/, will add this link to coverletter.
On 11/09/2023 12:15, Tengfei Fan wrote: >>> >>> My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check' >>> on your patch (DT_CHECKER_FLAGS is new in v5.13): >>> >>> yamllint warnings/errors: >>> >>> dtschema/dtc warnings/errors: >>> Documentation/devicetree/bindings/interconnect/qcom,sm4450-rpmh.example.dts:18:18: fatal error: dt-bindings/clock/qcom,gcc-sm4450.h: No such file or directory >>> 18 | #include <dt-bindings/clock/qcom,gcc-sm4450.h> >>> | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ >>> compilation terminated. >>> make[2]: *** [scripts/Makefile.lib:419: >>> Documentation/devicetree/bindings/interconnect/qcom,sm4450-rpmh.example.dtb] Error 1 >>> make[2]: *** Waiting for unfinished jobs.... >>> make[1]: *** [/builds/robherring/dt-review-ci/linux/Makefile:1500: >>> dt_binding_check] Error 2 >>> make: *** [Makefile:234: __sub-make] Error 2 >>> >>> doc reference errors (make refcheckdocs): >>> >>> See >>> https://patchwork.ozlabs.org/project/devicetree-bindings/patch/20230908064427.26999-2-quic_tengfan@quicinc.com >>> >>> The base for the series is generally the latest rc1. A different >>> dependency >>> should be noted in *this* patch. >>> >>> If you already ran 'make dt_binding_check' and didn't see the above >>> error(s), then make sure 'yamllint' is installed and dt-schema is up to >>> date: >>> >>> pip3 install dtschema --upgrade >>> >>> Please check and re-submit after running the above command yourself. Note >>> that DT_SCHEMA_FILES can be set to your schema file to speed up checking >>> your schema. However, it must be unset to test all examples with your >>> schema. >>> >> Thanks review this patch, will setup new env for verify again. >> > this error is due to have dependence with: > https://lore.kernel.org/linux-arm-msm/20230824173410.550126-1-quic_ajipan@quicinc.com/, > will add this link to coverletter. The patch should have it for the bot to understand it. Best regards, Krzysztof
On 08/09/2023 08:44, Tengfei Fan wrote: > The Qualcomm SM4450 SoC has several bus fabrics that could be controlled > and tuned dynamically according to the bandwidth demand. > > Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com> > --- Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> --- This is an automated instruction, just in case, because many review tags are being ignored. If you know the process, you can skip it (please do not feel offended by me posting it here - no bad intentions intended). If you do not know the process, here is a short explanation: Please add Acked-by/Reviewed-by/Tested-by tags when posting new versions, under or above your Signed-off-by tag. Tag is "received", when provided in a message replied to you on the mailing list. Tools like b4 can help here. However, there's no need to repost patches *only* to add the tags. The upstream maintainer will do that for tags received on the version they apply. https://elixir.bootlin.com/linux/v6.5-rc3/source/Documentation/process/submitting-patches.rst#L577 Best regards, Krzysztof
diff --git a/Documentation/devicetree/bindings/interconnect/qcom,sm4450-rpmh.yaml b/Documentation/devicetree/bindings/interconnect/qcom,sm4450-rpmh.yaml new file mode 100644 index 000000000000..2744e4b285b6 --- /dev/null +++ b/Documentation/devicetree/bindings/interconnect/qcom,sm4450-rpmh.yaml @@ -0,0 +1,133 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/interconnect/qcom,sm4450-rpmh.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm RPMh Network-On-Chip Interconnect on SM4450 + +maintainers: + - Tengfei Fan <quic_tengfan@quicinc.com> + +description: | + RPMh interconnect providers support system bandwidth requirements through + RPMh hardware accelerators known as Bus Clock Manager (BCM). + + See also:: include/dt-bindings/interconnect/qcom,sm4450.h + +properties: + compatible: + enum: + - qcom,sm4450-aggre1-noc + - qcom,sm4450-aggre2-noc + - qcom,sm4450-clk-virt + - qcom,sm4450-cnoc2 + - qcom,sm4450-cnoc3 + - qcom,sm4450-gem-noc + - qcom,sm4450-lpass-ag-noc + - qcom,sm4450-mc-virt + - qcom,sm4450-mmss-noc + - qcom,sm4450-pcie-anoc + - qcom,sm4450-system-noc + - qcom,sm4450-video-aggre-noc + + reg: + maxItems: 1 + + clocks: + minItems: 1 + maxItems: 4 + +required: + - compatible + +allOf: + - $ref: qcom,rpmh-common.yaml# + - if: + properties: + compatible: + contains: + enum: + - qcom,sm4450-clk-virt + - qcom,sm4450-mc-virt + then: + properties: + reg: false + else: + required: + - reg + + - if: + properties: + compatible: + contains: + enum: + - qcom,sm4450-pcie-anoc + then: + properties: + clocks: + items: + - description: aggre-NOC PCIe 0 AXI clock + - description: cfg-NOC PCIe a-NOC AHB clock + + - if: + properties: + compatible: + contains: + enum: + - qcom,sm4450-aggre1-noc + then: + properties: + clocks: + items: + - description: aggre USB3 PRIM AXI clock + + - if: + properties: + compatible: + contains: + enum: + - qcom,sm4450-aggre2-noc + then: + properties: + clocks: + items: + - description: RPMH CC IPA clock + - description: aggre-NOC USB3 AXI clock + + - if: + properties: + compatible: + contains: + enum: + - qcom,sm4450-aggre1-noc + - qcom,sm4450-aggre2-noc + - qcom,sm4450-pcie-anoc + then: + required: + - clocks + else: + properties: + clocks: false + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/clock/qcom,gcc-sm4450.h> + #include <dt-bindings/clock/qcom,rpmh.h> + + interconnect-0 { + compatible = "qcom,sm4450-clk-virt"; + #interconnect-cells = <2>; + qcom,bcm-voters = <&apps_bcm_voter>; + }; + + interconnect@1700000 { + compatible = "qcom,sm4450-aggre2-noc"; + reg = <0 0x01700000 0 0x31080>; + #interconnect-cells = <2>; + qcom,bcm-voters = <&apps_bcm_voter>; + clocks = <&rpmhcc RPMH_IPA_CLK>, + <&gcc GCC_AGGRE_USB3_PRIM_AXI_CLK>; + }; diff --git a/include/dt-bindings/interconnect/qcom,sm4450.h b/include/dt-bindings/interconnect/qcom,sm4450.h new file mode 100644 index 000000000000..92aa5454809f --- /dev/null +++ b/include/dt-bindings/interconnect/qcom,sm4450.h @@ -0,0 +1,163 @@ +/* SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause) */ +/* + * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#ifndef __DT_BINDINGS_INTERCONNECT_QCOM_SM4450_H +#define __DT_BINDINGS_INTERCONNECT_QCOM_SM4450_H + +#define MASTER_QUP_0 0 +#define MASTER_A1NOC_CFG 1 +#define MASTER_SDCC_2 2 +#define SLAVE_A1NOC_SNOC 3 +#define SLAVE_SERVICE_A1NOC 4 + +#define MASTER_QDSS_BAM 0 +#define MASTER_QUP_1 1 +#define MASTER_A2NOC_CFG 2 +#define MASTER_CNOC_A2NOC 3 +#define MASTER_CRYPTO 4 +#define MASTER_IPA 5 +#define MASTER_WLAN 6 +#define MASTER_QDSS_ETR 7 +#define MASTER_QDSS_ETR_1 8 +#define MASTER_SDCC_1 9 +#define MASTER_UFS_MEM 10 +#define MASTER_USB3_0 11 +#define SLAVE_A2NOC_SNOC 12 +#define SLAVE_SERVICE_A2NOC 13 + +#define MASTER_QUP_CORE_0 0 +#define MASTER_QUP_CORE_1 1 +#define SLAVE_QUP_CORE_0 2 +#define SLAVE_QUP_CORE_1 3 + +#define MASTER_CNOC3_CNOC2 0 +#define MASTER_QDSS_DAP 1 +#define SLAVE_AHB2PHY_SOUTH 2 +#define SLAVE_AHB2PHY_NORTH 3 +#define SLAVE_ANOC_THROTTLE_CFG 4 +#define SLAVE_CAMERA_CFG 5 +#define SLAVE_CLK_CTL 6 +#define SLAVE_RBCPR_CX_CFG 7 +#define SLAVE_RBCPR_MX_CFG 8 +#define SLAVE_CRYPTO_0_CFG 9 +#define SLAVE_CX_RDPM 10 +#define SLAVE_DISPLAY_CFG 11 +#define SLAVE_GFX3D_CFG 12 +#define SLAVE_IMEM_CFG 13 +#define SLAVE_IPA_CFG 14 +#define SLAVE_IPC_ROUTER_CFG 15 +#define SLAVE_LPASS 16 +#define SLAVE_CNOC_MSS 17 +#define SLAVE_MX_RDPM 18 +#define SLAVE_PCIE_0_CFG 19 +#define SLAVE_PDM 20 +#define SLAVE_PIMEM_CFG 21 +#define SLAVE_PMU_WRAPPER_CFG 22 +#define SLAVE_PRNG 23 +#define SLAVE_QUP_0 24 +#define SLAVE_QUP_1 25 +#define SLAVE_SDC1 26 +#define SLAVE_SDCC_2 27 +#define SLAVE_TCSR 28 +#define SLAVE_TLMM 29 +#define SLAVE_UFS_MEM_CFG 30 +#define SLAVE_USB3_0 31 +#define SLAVE_VENUS_CFG 32 +#define SLAVE_VSENSE_CTRL_CFG 33 +#define SLAVE_A1NOC_CFG 34 +#define SLAVE_A2NOC_CFG 35 +#define SLAVE_CNOC2_CNOC3 36 +#define SLAVE_CNOC_MNOC_CFG 37 +#define SLAVE_PCIE_ANOC_CFG 38 +#define SLAVE_SNOC_CFG 39 +#define SLAVE_VIDEO_ANOC_CFG 40 + +#define MASTER_CNOC2_CNOC3 0 +#define MASTER_GEM_NOC_CNOC 1 +#define MASTER_GEM_NOC_PCIE_SNOC 2 +#define SLAVE_AOSS 3 +#define SLAVE_APPSS 4 +#define SLAVE_QDSS_CFG 5 +#define SLAVE_TME_CFG 6 +#define SLAVE_WLAN 7 +#define SLAVE_CNOC3_CNOC2 8 +#define SLAVE_CNOC_A2NOC 9 +#define SLAVE_BOOT_IMEM 10 +#define SLAVE_IMEM 11 +#define SLAVE_PIMEM 12 +#define SLAVE_PCIE_0 13 +#define SLAVE_QDSS_STM 14 +#define SLAVE_TCU 15 + +#define MASTER_GPU_TCU 0 +#define MASTER_SYS_TCU 1 +#define MASTER_APPSS_PROC 2 +#define MASTER_GFX3D 3 +#define MASTER_MSS_PROC 4 +#define MASTER_MNOC_HF_MEM_NOC 5 +#define MASTER_MNOC_SF_MEM_NOC 6 +#define MASTER_ANOC_PCIE_GEM_NOC 7 +#define MASTER_SNOC_GC_MEM_NOC 8 +#define MASTER_SNOC_SF_MEM_NOC 9 +#define MASTER_WLAN_Q6 10 +#define SLAVE_GEM_NOC_CNOC 11 +#define SLAVE_LLCC 12 +#define SLAVE_MEM_NOC_PCIE_SNOC 13 +#define MASTER_MNOC_HF_MEM_NOC_DISP 14 +#define MASTER_ANOC_PCIE_GEM_NOC_DISP 15 +#define SLAVE_LLCC_DISP 16 + +#define MASTER_CNOC_LPASS_AG_NOC 0 +#define MASTER_LPASS_PROC 1 +#define SLAVE_LPASS_CORE_CFG 2 +#define SLAVE_LPASS_LPI_CFG 3 +#define SLAVE_LPASS_MPU_CFG 4 +#define SLAVE_LPASS_TOP_CFG 5 +#define SLAVE_LPASS_SNOC 6 +#define SLAVE_SERVICES_LPASS_AML_NOC 7 +#define SLAVE_SERVICE_LPASS_AG_NOC 8 + +#define MASTER_LLCC 0 +#define SLAVE_EBI1 1 +#define MASTER_LLCC_DISP 2 +#define SLAVE_EBI1_DISP 3 + +#define MASTER_CAMNOC_HF 0 +#define MASTER_CAMNOC_ICP 1 +#define MASTER_CAMNOC_SF 2 +#define MASTER_MDP 3 +#define MASTER_CNOC_MNOC_CFG 4 +#define MASTER_VIDEO_P0_MMNOC 5 +#define MASTER_VIDEO_PROC_MMNOC 6 +#define SLAVE_MNOC_HF_MEM_NOC 7 +#define SLAVE_MNOC_SF_MEM_NOC 8 +#define SLAVE_SERVICE_MNOC 9 +#define MASTER_MDP_DISP 10 +#define SLAVE_MNOC_HF_MEM_NOC_DISP 11 + +#define MASTER_PCIE_ANOC_CFG 0 +#define MASTER_PCIE_0 1 +#define SLAVE_ANOC_PCIE_GEM_NOC 2 +#define SLAVE_SERVICE_PCIE_ANOC 3 + +#define MASTER_GIC_AHB 0 +#define MASTER_A1NOC_SNOC 1 +#define MASTER_A2NOC_SNOC 2 +#define MASTER_LPASS_ANOC 3 +#define MASTER_SNOC_CFG 4 +#define MASTER_PIMEM 5 +#define MASTER_GIC 6 +#define SLAVE_SNOC_GEM_NOC_GC 7 +#define SLAVE_SNOC_GEM_NOC_SF 8 +#define SLAVE_SERVICE_SNOC 9 + +#define MASTER_VIDEO_ANOC_CFG 0 +#define MASTER_VIDEO_P0 1 +#define MASTER_VIDEO_PROC 2 +#define SLAVE_VIDEO_0_ANOC_MMNOC 3 +#define SLAVE_VIDEO_1_ANOC_MMNOC 4 +#define SLAVE_SERVICE_SRVC_VIDEO_ANOC 5 + +#endif
The Qualcomm SM4450 SoC has several bus fabrics that could be controlled and tuned dynamically according to the bandwidth demand. Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com> --- .../interconnect/qcom,sm4450-rpmh.yaml | 133 ++++++++++++++ .../dt-bindings/interconnect/qcom,sm4450.h | 163 ++++++++++++++++++ 2 files changed, 296 insertions(+) create mode 100644 Documentation/devicetree/bindings/interconnect/qcom,sm4450-rpmh.yaml create mode 100644 include/dt-bindings/interconnect/qcom,sm4450.h