| Message ID | 20240604011157.2358019-2-quic_sibis@quicinc.com (mailing list archive) |
|---|---|
| State | Handled Elsewhere, archived |
| Headers | show |
| Series | arm64: dts: qcom: x1e80100: Enable bwmon and fastrpc support | expand |
On 04/06/2024 03:11, Sibi Sankar wrote: > Document X1E80100 BWMONs, which has multiple (one per cluster) BWMONv4 > instances for the CPU->LLCC path and one BWMONv5 instance for LLCC->DDR > path. > > Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com> > --- Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Best regards, Krzysztof
diff --git a/Documentation/devicetree/bindings/interconnect/qcom,msm8998-bwmon.yaml b/Documentation/devicetree/bindings/interconnect/qcom,msm8998-bwmon.yaml index 05067e197abe..05f6bd348138 100644 --- a/Documentation/devicetree/bindings/interconnect/qcom,msm8998-bwmon.yaml +++ b/Documentation/devicetree/bindings/interconnect/qcom,msm8998-bwmon.yaml @@ -35,6 +35,7 @@ properties: - qcom,sm8250-cpu-bwmon - qcom,sm8550-cpu-bwmon - qcom,sm8650-cpu-bwmon + - qcom,x1e80100-cpu-bwmon - const: qcom,sdm845-bwmon # BWMON v4, unified register space - items: - enum: @@ -44,6 +45,7 @@ properties: - qcom,sm8250-llcc-bwmon - qcom,sm8550-llcc-bwmon - qcom,sm8650-llcc-bwmon + - qcom,x1e80100-llcc-bwmon - const: qcom,sc7280-llcc-bwmon - const: qcom,sc7280-llcc-bwmon # BWMON v5 - const: qcom,sdm845-llcc-bwmon # BWMON v5
Document X1E80100 BWMONs, which has multiple (one per cluster) BWMONv4 instances for the CPU->LLCC path and one BWMONv5 instance for LLCC->DDR path. Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com> --- .../devicetree/bindings/interconnect/qcom,msm8998-bwmon.yaml | 2 ++ 1 file changed, 2 insertions(+)