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Wysocki" , Viresh Kumar , Lee Jones , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Nishanth Menon , Vignesh Raghavendra , Tero Kristo CC: Vibhore Vardhan , , , , , Bryan Brattlof X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=3295; i=bb@ti.com; h=from:subject:message-id; bh=247OK9zNWZq/7rcJM9RO5Cm+DJpgqUplY1Dpd5HKDN0=; b=owNCWmg5MUFZJlNZKFoA/wAAZ3/////9nu9/DzXf893/8yb/Xjn3/51W78/1R/rf39rf71+wA RsYIekAA00AaAA0NNAAAAGhoDEDQADQANPUA0GgAAaDTQDQ00aaeptQ8kae0og0aAPRAAGgAAAN NNNAAABo9RoMQ0HpAekNNAyA9T1HqAPUaAyG1AeoBkaBoCDR6TTTQyGjQ0NNA0xGQ0MQ0aGgAaN GEMmTRiAANA0NDTRpoAAAaBk0ZDTRoNAAAMgxsHbGwBAbDPSAnOkhccFTVycU7/T4HloMS6A8np dcEmmn3uKmrXFsCLXf72O5M1YR4LbiwOxnxqF6BkZa4XZT7oDqyF+luDEsKwBUdjRG5bYozv73F 1iUdMMV4z6LR5phEGCAXwEYqpfDcVKeD4bvgfJy6Ke5MPv7QOzqLkgmcZdymOP31vb0SohpJSHN diMJglf5bi6xo2nGIHUky5VkSpwiFnr6CnzYOqMGp+i2mtYKFGK//JPqcX6IkdpkmCAU8Cr3LRD ln0hQRaXOKnZQXM15IUMZSiUS1KmI8yDtN4pz/OsU/B5kDFdaVSqWT6RAMgDlW7wcVQ88ejdoBY qjFYH2aTi5gRF/tnVaJGFjBw9rmikoTSIH8MB3KHUwQ4MRmXd+UtGUt65wHAD9Klng2oaAvo25G F5oQhYAlOT/i7kinChIFC0Af4A= X-Developer-Key: i=bb@ti.com; a=openpgp; fpr=D3D177E40A38DF4D1853FEEF41B90D5D71D56CE0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 As the AM62Ax SoC family matures more speed grades are being defined. These new grades unfortunately no longer align with the AM62x SoC family. Define a new table with new OPP speed grade limits for the AM62Ax Signed-off-by: Bryan Brattlof --- drivers/cpufreq/ti-cpufreq.c | 59 +++++++++++++++++++++++++++++++++++++++++++- 1 file changed, 58 insertions(+), 1 deletion(-) diff --git a/drivers/cpufreq/ti-cpufreq.c b/drivers/cpufreq/ti-cpufreq.c index 714ed53753fa5..a80698f3cfe65 100644 --- a/drivers/cpufreq/ti-cpufreq.c +++ b/drivers/cpufreq/ti-cpufreq.c @@ -47,6 +47,28 @@ #define AM625_SUPPORT_S_MPU_OPP BIT(1) #define AM625_SUPPORT_T_MPU_OPP BIT(2) +enum { + AM62A7_EFUSE_M_MPU_OPP = 13, + AM62A7_EFUSE_N_MPU_OPP, + AM62A7_EFUSE_O_MPU_OPP, + AM62A7_EFUSE_P_MPU_OPP, + AM62A7_EFUSE_Q_MPU_OPP, + AM62A7_EFUSE_R_MPU_OPP, + AM62A7_EFUSE_S_MPU_OPP, + /* + * The V, U, and T speed grade numbering is out of order + * to align with the AM625 more uniformly. I promise I know + * my ABCs ;) + */ + AM62A7_EFUSE_V_MPU_OPP, + AM62A7_EFUSE_U_MPU_OPP, + AM62A7_EFUSE_T_MPU_OPP, +}; + +#define AM62A7_SUPPORT_N_MPU_OPP BIT(0) +#define AM62A7_SUPPORT_R_MPU_OPP BIT(1) +#define AM62A7_SUPPORT_V_MPU_OPP BIT(2) + #define VERSION_COUNT 2 struct ti_cpufreq_data; @@ -112,6 +134,32 @@ static unsigned long omap3_efuse_xlate(struct ti_cpufreq_data *opp_data, return BIT(efuse); } +static unsigned long am62a7_efuse_xlate(struct ti_cpufreq_data *opp_data, + unsigned long efuse) +{ + unsigned long calc_efuse = AM62A7_SUPPORT_N_MPU_OPP; + + switch (efuse) { + case AM62A7_EFUSE_V_MPU_OPP: + case AM62A7_EFUSE_U_MPU_OPP: + case AM62A7_EFUSE_T_MPU_OPP: + case AM62A7_EFUSE_S_MPU_OPP: + calc_efuse |= AM62A7_SUPPORT_V_MPU_OPP; + fallthrough; + case AM62A7_EFUSE_R_MPU_OPP: + case AM62A7_EFUSE_Q_MPU_OPP: + case AM62A7_EFUSE_P_MPU_OPP: + case AM62A7_EFUSE_O_MPU_OPP: + calc_efuse |= AM62A7_SUPPORT_R_MPU_OPP; + fallthrough; + case AM62A7_EFUSE_N_MPU_OPP: + case AM62A7_EFUSE_M_MPU_OPP: + calc_efuse |= AM62A7_SUPPORT_N_MPU_OPP; + } + + return calc_efuse; +} + static unsigned long am625_efuse_xlate(struct ti_cpufreq_data *opp_data, unsigned long efuse) { @@ -234,6 +282,15 @@ static struct ti_cpufreq_soc_data am625_soc_data = { .multi_regulator = false, }; +static struct ti_cpufreq_soc_data am62a7_soc_data = { + .efuse_xlate = am62a7_efuse_xlate, + .efuse_offset = 0x0, + .efuse_mask = 0x07c0, + .efuse_shift = 0x6, + .rev_offset = 0x0014, + .multi_regulator = false, +}; + /** * ti_cpufreq_get_efuse() - Parse and return efuse value present on SoC * @opp_data: pointer to ti_cpufreq_data context @@ -337,7 +394,7 @@ static const struct of_device_id ti_cpufreq_of_match[] = { { .compatible = "ti,omap34xx", .data = &omap34xx_soc_data, }, { .compatible = "ti,omap36xx", .data = &omap36xx_soc_data, }, { .compatible = "ti,am625", .data = &am625_soc_data, }, - { .compatible = "ti,am62a7", .data = &am625_soc_data, }, + { .compatible = "ti,am62a7", .data = &am62a7_soc_data, }, { .compatible = "ti,am62p5", .data = &am625_soc_data, }, /* legacy */ { .compatible = "ti,omap3430", .data = &omap34xx_soc_data, },