From patchwork Thu Sep 19 08:28:09 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dhruva Gole X-Patchwork-Id: 13807504 Received: from lelv0142.ext.ti.com (lelv0142.ext.ti.com [198.47.23.249]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DD7E3199FA6; Thu, 19 Sep 2024 08:31:31 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.23.249 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1726734693; cv=none; b=mm29EKDqVzbQ7LZ9s9d0k7tksjUwAF8v9l6zxXg9LIf+UUrvcrmITfxjQcoK46f09Evi7cPFiJgLCwiUWb99NF/VETCoh5lKaHPbHAI6On/QZcbm+DeKUrmt2yvdgXJZjCPQL2zDVhbv+gAOcNQ2tGlT6mO3UV87l1I1HDPWrCU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1726734693; c=relaxed/simple; bh=KyV2zC4Liuyha9xYak8+LF0Iwld+CE3Ck4a/gAiIBrk=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=ewGDvPNtzNfxPxRjU6MJv9yzZVshnFXqKczgpgSVfdZPy0HTXXEa9VrJAYv2dfbm+u6MRI1dNhq62lACf3h0inlbKtqFpa1nqrTheFQmx4JeJQfez7IUifi7dTRAt3m0Jv2fX3quZm0yX8v7/k0qAqMNupeVtqtyTecTovg3fa8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com; spf=pass smtp.mailfrom=ti.com; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b=XQ5hraN8; arc=none smtp.client-ip=198.47.23.249 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ti.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="XQ5hraN8" Received: from lelv0266.itg.ti.com ([10.180.67.225]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id 48J8VPGo015260; Thu, 19 Sep 2024 03:31:25 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1726734685; bh=9+H8jfr0DvyWTXPgRbn3CBF7/rhD8jLa04YmFYcVBeA=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=XQ5hraN8BM6ch6ZyJtvjBR4mlBcsf3hSFVfcX1Qs+1KsifDOL4GXEriyhW+gsBqAh gDygntiVdaD3zk1hHZ8rcjmwRfJmcC+lz4sb9IjUAEqGTFNCvCknmJqKT4a+7sSiq+ +bd4dulph4BHc9/zfbNwW/7FnKg0CDQEGzBisVYo= Received: from DFLE103.ent.ti.com (dfle103.ent.ti.com [10.64.6.24]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTP id 48J8VP7J077639; Thu, 19 Sep 2024 03:31:25 -0500 Received: from DFLE104.ent.ti.com (10.64.6.25) by DFLE103.ent.ti.com (10.64.6.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Thu, 19 Sep 2024 03:31:25 -0500 Received: from lelvsmtp6.itg.ti.com (10.180.75.249) by DFLE104.ent.ti.com (10.64.6.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Thu, 19 Sep 2024 03:31:24 -0500 Received: from lcpd911.dhcp.ti.com (lcpd911.dhcp.ti.com [172.24.227.226]) by lelvsmtp6.itg.ti.com (8.15.2/8.15.2) with ESMTP id 48J8Urga042798; Thu, 19 Sep 2024 03:31:22 -0500 From: Dhruva Gole To: Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Viresh Kumar , "Rafael J . Wysocki" CC: , , , , Dhruva Gole , Rob Herring , Krzysztof Kozlowski Subject: [PATCH V4 5/6] arm64: dts: ti: k3-am62: use opp_efuse_table for opp-table syscon Date: Thu, 19 Sep 2024 13:58:09 +0530 Message-ID: <20240919082809.174589-6-d-gole@ti.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240919082809.174589-1-d-gole@ti.com> References: <20240919082809.174589-1-d-gole@ti.com> Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-C2ProcessedOrg: 333ef613-75bf-4e12-a4b1-8e3623f5dcea Add another entry in the wkup_conf for the syscon node, and then use that for the syscon in opp-table. Marking entire wkup_conf as "syscon", "simple-mfd" is wrong and needs to be addressed similar to how other child-nodes in wkup_conf are implemented in the same file. Signed-off-by: Dhruva Gole --- **DEPENDS ON:** PATCH 6/6: cpufreq: ti-cpufreq: Update the efuse/rev offsets Link to v1: https://lore.kernel.org/all/20240902093222.2828345-2-d-gole@ti.com/ No changes, just combined it as part of Bryan's AM62A and AM62P series and sending it all together. --- arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi | 7 ++++++- arch/arm64/boot/dts/ti/k3-am625.dtsi | 2 +- 2 files changed, 7 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi index e0afafd532a5..b2b65e31c7cf 100644 --- a/arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62-wakeup.dtsi @@ -10,7 +10,7 @@ &cbass_wakeup { wkup_conf: syscon@43000000 { bootph-all; - compatible = "syscon", "simple-mfd"; + compatible = "simple-bus"; reg = <0x00 0x43000000 0x00 0x20000>; #address-cells = <1>; #size-cells = <1>; @@ -22,6 +22,11 @@ chipid: chipid@14 { reg = <0x14 0x4>; }; + opp_efuse_table: syscon@18 { + compatible = "ti,am62-opp-efuse-table", "syscon"; + reg = <0x18 0x4>; + }; + cpsw_mac_syscon: ethernet-mac-syscon@200 { compatible = "ti,am62p-cpsw-mac-efuse", "syscon"; reg = <0x200 0x8>; diff --git a/arch/arm64/boot/dts/ti/k3-am625.dtsi b/arch/arm64/boot/dts/ti/k3-am625.dtsi index c3d1db47dc9f..c249883a8a8d 100644 --- a/arch/arm64/boot/dts/ti/k3-am625.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am625.dtsi @@ -108,7 +108,7 @@ cpu3: cpu@3 { a53_opp_table: opp-table { compatible = "operating-points-v2-ti-cpu"; opp-shared; - syscon = <&wkup_conf>; + syscon = <&opp_efuse_table>; opp-200000000 { opp-hz = /bits/ 64 <200000000>;