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Shenoy" CC: Perry Yuan , , , Dhananjay Ugwekar , Mario Limonciello Subject: [PATCH v3 09/15] cpufreq/amd-pstate: Change amd_pstate_update_perf() to return an int Date: Mon, 9 Dec 2024 12:52:42 -0600 Message-ID: <20241209185248.16301-10-mario.limonciello@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241209185248.16301-1-mario.limonciello@amd.com> References: <20241209185248.16301-1-mario.limonciello@amd.com> Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CH1PEPF0000A348:EE_|PH7PR12MB6834:EE_ X-MS-Office365-Filtering-Correlation-Id: 44178ff0-4bf6-4461-3fa7-08dd1882bd41 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|82310400026|36860700013|1800799024; X-Microsoft-Antispam-Message-Info: ZoINt0oj0V324SUScG2jKFU05BfROoHBYwtMx4K9aibW2q/aZApVCxuu38tVrpOQwXwg5x0GY3f+FjIUp/mmsGk8u5gY5DoingiQ4jYQOQLgZWGIjDlcEzeDg05/8YIiN2ByQslLetjBFWfOlejSvB6n4NRgYkQY0fIArO4+wk09SyNRgriWwPoqDx5UkatqGEgGRawf7MsaE7HbijY6g3LttIAC/jp/dh5tEbrqE86fytrgymrTBjd0J9rgpEQ9jqEfAz6JAL+5n97RRt4TeVD205JN5/uPHQoH80aXpo8x+eJpS4/GPywCpS2gZ9QnYbrsdKHfE9WBcRozz92h3yM6lEwcME8BcSViDw16I8F0MtPTuPDm3Nm4NRqUgB8RgX41xNUv9jiRuyk1QMDZQsVpas2HAbR5ot5jBASOXRy0GZMPt9nd7iSAr9vb8XBTUXsldONM8zvFhnzG7I3eF40iFhMznss0+ceKeRrTnz4Suk+jgjDq4EXdt3RfOT3xIS45Q9GMXh1w4okH52mdplm4H1YSp3S6KXl2mb6MQoHUs4xwMP9vhEUxtRmQnBrqptsJy1M8vBfDhFv+Od4EEUEuLBVEO4H6bon8NBTjViGyDMbdX67ImyKd+A1WvGxU53l08jTW5BGqFG6b+F+3eQWywTGqg/Dz4wO3jhQBCxBjdO0iAx2j/w/xjVma2LkB/C29GW5JJwOXNoHZVfeUSLARKcr8Y3xVPchdzSi/JbIxyEkW2CA6RVo8kWYGUlQzCeKAeBaXKfnGg1CpB1I3MeKFFdxsikgF0vyQ4L4r1ol2fPOzZ80acB226oOOfQymL0rTp//YE8iUMIZxLI7HzqVxcHDZyewZ4ozwiesh1ylTbImO4tsAi5DwR/xgVlANoHhLwunvo/8yiVlRE7DnP6OE0GMVGvR+7GPdCFqVuqJRZFuiROcU8j8mgTndAKkUzGaRtVnjecyn1wJcMl8KffIedPhnGb9RDFVTUR8OiEfAwRBbr5WOrB60tMENrsQABIyhbw1GnGJLm3EYTCn4nxNmaTlIktBTo+Iczkiv/Xmnmm/gikFNhzipk6WDNZJ9wodAuBtpHwUQbwAFv7lZGw4btNhfqL4LaSL1ARorY4hW3X4dD7BKPt699o5YeWVv2MSQU3ggfEOPPO92fSEZ78+AbIN5XOv3/k2QTkasf3RubBkDlI4IInLHJt0bxATYbvwWgk/kc/DbaKGn7aqdqn/9H9nFf+HbvXf/ixOhDzhFdtPP04p77NBbdqt8SlVwlk4SiHprGTChNTOAHvJA2sbOvgKSal4PREYZip9Ukh5tHYRbzyt9WJ0T0phwmRYUb8UzgRfmu+XfdNEf8YBR0clwBrXvSFDNZADuOP6fd4fjhxrI/JGmGNlFSi67nOJtYXeGOQegWwDA6RDaGVUwGInFQVFSYfENbB4UNiJuZIvTexh/JesIFx/A+rcKSkSn X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(376014)(82310400026)(36860700013)(1800799024);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 09 Dec 2024 18:53:15.5525 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 44178ff0-4bf6-4461-3fa7-08dd1882bd41 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CH1PEPF0000A348.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH7PR12MB6834 As msr_update_perf() calls an MSR it's possible that it fails. Pass this return code up to the caller. Reviewed-by: Gautham R. Shenoy Signed-off-by: Mario Limonciello --- drivers/cpufreq/amd-pstate.c | 22 ++++++++++++---------- 1 file changed, 12 insertions(+), 10 deletions(-) diff --git a/drivers/cpufreq/amd-pstate.c b/drivers/cpufreq/amd-pstate.c index 8a173359c2754..3a3df67c096d5 100644 --- a/drivers/cpufreq/amd-pstate.c +++ b/drivers/cpufreq/amd-pstate.c @@ -251,24 +251,26 @@ static int amd_pstate_get_energy_pref_index(struct amd_cpudata *cpudata) return index; } -static void msr_update_perf(struct amd_cpudata *cpudata, u32 min_perf, +static int msr_update_perf(struct amd_cpudata *cpudata, u32 min_perf, u32 des_perf, u32 max_perf, bool fast_switch) { - if (fast_switch) + if (fast_switch) { wrmsrl(MSR_AMD_CPPC_REQ, READ_ONCE(cpudata->cppc_req_cached)); - else - wrmsrl_on_cpu(cpudata->cpu, MSR_AMD_CPPC_REQ, - READ_ONCE(cpudata->cppc_req_cached)); + return 0; + } + + return wrmsrl_on_cpu(cpudata->cpu, MSR_AMD_CPPC_REQ, + READ_ONCE(cpudata->cppc_req_cached)); } DEFINE_STATIC_CALL(amd_pstate_update_perf, msr_update_perf); -static inline void amd_pstate_update_perf(struct amd_cpudata *cpudata, +static inline int amd_pstate_update_perf(struct amd_cpudata *cpudata, u32 min_perf, u32 des_perf, u32 max_perf, bool fast_switch) { - static_call(amd_pstate_update_perf)(cpudata, min_perf, des_perf, - max_perf, fast_switch); + return static_call(amd_pstate_update_perf)(cpudata, min_perf, des_perf, + max_perf, fast_switch); } static int msr_set_epp(struct amd_cpudata *cpudata, u32 epp) @@ -480,7 +482,7 @@ static inline int amd_pstate_init_perf(struct amd_cpudata *cpudata) return static_call(amd_pstate_init_perf)(cpudata); } -static void shmem_update_perf(struct amd_cpudata *cpudata, +static int shmem_update_perf(struct amd_cpudata *cpudata, u32 min_perf, u32 des_perf, u32 max_perf, bool fast_switch) { @@ -490,7 +492,7 @@ static void shmem_update_perf(struct amd_cpudata *cpudata, perf_ctrls.min_perf = min_perf; perf_ctrls.desired_perf = des_perf; - cppc_set_perf(cpudata->cpu, &perf_ctrls); + return cppc_set_perf(cpudata->cpu, &perf_ctrls); } static inline bool amd_pstate_sample(struct amd_cpudata *cpudata)