Message ID | 20250127093128.2611247-4-quic_srichara@quicinc.com (mailing list archive) |
---|---|
State | New |
Delegated to: | viresh kumar |
Headers | show |
Series | Enable cpufreq for IPQ5424 | expand |
On 27.01.2025 10:31 AM, Sricharan R wrote: > From: Md Sadre Alam <quic_mdalam@quicinc.com> > > IPQ5424 have different OPPs available for the CPU based on > SoC variant. This can be determined through use of an eFuse > register present in the silicon. > > Added support for ipq5424 on nvmem driver which helps to > determine OPPs at runtime based on the eFuse register which > has the CPU frequency limits. opp-supported-hw dt binding > can be used to indicate the available OPPs for each limit. > > nvmem driver also creates the "cpufreq-dt" platform_device after > passing the version matching data to the OPP framework so that the > cpufreq-dt handles the actual cpufreq implementation. > > Signed-off-by: Md Sadre Alam <quic_mdalam@quicinc.com> > Signed-off-by: Sricharan Ramabadhran <quic_srichara@quicinc.com> > --- > drivers/cpufreq/cpufreq-dt-platdev.c | 1 + > drivers/cpufreq/qcom-cpufreq-nvmem.c | 5 +++++ > 2 files changed, 6 insertions(+) > > diff --git a/drivers/cpufreq/cpufreq-dt-platdev.c b/drivers/cpufreq/cpufreq-dt-platdev.c > index 9c198bd4f7e9..4045bc3ce805 100644 > --- a/drivers/cpufreq/cpufreq-dt-platdev.c > +++ b/drivers/cpufreq/cpufreq-dt-platdev.c > @@ -187,6 +187,7 @@ static const struct of_device_id blocklist[] __initconst = { > { .compatible = "ti,am62p5", }, > > { .compatible = "qcom,ipq5332", }, > + { .compatible = "qcom,ipq5424", }, > { .compatible = "qcom,ipq6018", }, > { .compatible = "qcom,ipq8064", }, > { .compatible = "qcom,ipq8074", }, > diff --git a/drivers/cpufreq/qcom-cpufreq-nvmem.c b/drivers/cpufreq/qcom-cpufreq-nvmem.c > index 3a8ed723a23e..102f7f1b031c 100644 > --- a/drivers/cpufreq/qcom-cpufreq-nvmem.c > +++ b/drivers/cpufreq/qcom-cpufreq-nvmem.c > @@ -200,6 +200,10 @@ static int qcom_cpufreq_kryo_name_version(struct device *cpu_dev, > case QCOM_ID_IPQ9574: > drv->versions = 1 << (unsigned int)(*speedbin); > break; > + case QCOM_ID_IPQ5424: > + case QCOM_ID_IPQ5404: > + drv->versions = (*speedbin != 0x3b) ? BIT(0) : BIT(1); Perhaps: drv->versions = (*speedbin == 0x3b) ? BIT(1) : BIT(0); But ultimately both work: Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Konrad
diff --git a/drivers/cpufreq/cpufreq-dt-platdev.c b/drivers/cpufreq/cpufreq-dt-platdev.c index 9c198bd4f7e9..4045bc3ce805 100644 --- a/drivers/cpufreq/cpufreq-dt-platdev.c +++ b/drivers/cpufreq/cpufreq-dt-platdev.c @@ -187,6 +187,7 @@ static const struct of_device_id blocklist[] __initconst = { { .compatible = "ti,am62p5", }, { .compatible = "qcom,ipq5332", }, + { .compatible = "qcom,ipq5424", }, { .compatible = "qcom,ipq6018", }, { .compatible = "qcom,ipq8064", }, { .compatible = "qcom,ipq8074", }, diff --git a/drivers/cpufreq/qcom-cpufreq-nvmem.c b/drivers/cpufreq/qcom-cpufreq-nvmem.c index 3a8ed723a23e..102f7f1b031c 100644 --- a/drivers/cpufreq/qcom-cpufreq-nvmem.c +++ b/drivers/cpufreq/qcom-cpufreq-nvmem.c @@ -200,6 +200,10 @@ static int qcom_cpufreq_kryo_name_version(struct device *cpu_dev, case QCOM_ID_IPQ9574: drv->versions = 1 << (unsigned int)(*speedbin); break; + case QCOM_ID_IPQ5424: + case QCOM_ID_IPQ5404: + drv->versions = (*speedbin != 0x3b) ? BIT(0) : BIT(1); + break; case QCOM_ID_MSM8996SG: case QCOM_ID_APQ8096SG: drv->versions = 1 << ((unsigned int)(*speedbin) + 4); @@ -591,6 +595,7 @@ static const struct of_device_id qcom_cpufreq_match_list[] __initconst __maybe_u { .compatible = "qcom,msm8996", .data = &match_data_kryo }, { .compatible = "qcom,qcs404", .data = &match_data_qcs404 }, { .compatible = "qcom,ipq5332", .data = &match_data_kryo }, + { .compatible = "qcom,ipq5424", .data = &match_data_kryo }, { .compatible = "qcom,ipq6018", .data = &match_data_ipq6018 }, { .compatible = "qcom,ipq8064", .data = &match_data_ipq8064 }, { .compatible = "qcom,ipq8074", .data = &match_data_ipq8074 },