Message ID | 20250219184133.816753-9-sohil.mehta@intel.com (mailing list archive) |
---|---|
State | Handled Elsewhere, archived |
Headers | show |
Series | Prepare for new Intel Family numbers | expand |
On Wed, Feb 19, 2025 at 8:29 PM Sohil Mehta <sohil.mehta@intel.com> wrote: > > Update the Intel Family checks to consistently use Family 15 instead of > Family 0xF. Also, get rid of one of last usages of x86_model by using > the new VFM checks. > > Update the incorrect comment since the check has changed[1][2] since the > initial commit ee1ca48fae7e ("ACPI: Disable ARB_DISABLE on platforms > where it is not needed"). > > [1]: commit 3e2ada5867b7 ("ACPI: fix Compaq Evo N800c (Pentium 4m) boot > hang regression") removed the P4 - Family 15. > > [2]: commit 03a05ed11529 ("ACPI: Use the ARB_DISABLE for the CPU which > model id is less than 0x0f.") got rid of CORE_YONAH - Family 6, model E. > > Signed-off-by: Sohil Mehta <sohil.mehta@intel.com> > Acked-by: Dave Hansen <dave.hansen@linux.intel.com> Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> and I'm assuming that this series will go in via x86. Thanks! > --- > v3: Pick up Dave's Ack. > v2: Improve commit message. > --- > arch/x86/include/asm/intel-family.h | 3 +++ > arch/x86/kernel/acpi/cstate.c | 8 ++++---- > 2 files changed, 7 insertions(+), 4 deletions(-) > > diff --git a/arch/x86/include/asm/intel-family.h b/arch/x86/include/asm/intel-family.h > index 9e6a13f03f0e..deb17c9c21e5 100644 > --- a/arch/x86/include/asm/intel-family.h > +++ b/arch/x86/include/asm/intel-family.h > @@ -187,6 +187,9 @@ > #define INTEL_XEON_PHI_KNL IFM(6, 0x57) /* Knights Landing */ > #define INTEL_XEON_PHI_KNM IFM(6, 0x85) /* Knights Mill */ > > +/* Notational marker denoting the last Family 6 model */ > +#define INTEL_FAM6_LAST IFM(6, 0xFF) > + > /* Family 15 - NetBurst */ > #define INTEL_P4_WILLAMETTE IFM(15, 0x01) /* Also Xeon Foster */ > #define INTEL_P4_PRESCOTT IFM(15, 0x03) > diff --git a/arch/x86/kernel/acpi/cstate.c b/arch/x86/kernel/acpi/cstate.c > index 5854f0b8f0f1..444602a0a3dd 100644 > --- a/arch/x86/kernel/acpi/cstate.c > +++ b/arch/x86/kernel/acpi/cstate.c > @@ -13,6 +13,7 @@ > #include <linux/sched.h> > > #include <acpi/processor.h> > +#include <asm/cpu_device_id.h> > #include <asm/cpuid.h> > #include <asm/mwait.h> > #include <asm/special_insns.h> > @@ -47,12 +48,11 @@ void acpi_processor_power_init_bm_check(struct acpi_processor_flags *flags, > /* > * On all recent Intel platforms, ARB_DISABLE is a nop. > * So, set bm_control to zero to indicate that ARB_DISABLE > - * is not required while entering C3 type state on > - * P4, Core and beyond CPUs > + * is not required while entering C3 type state. > */ > if (c->x86_vendor == X86_VENDOR_INTEL && > - (c->x86 > 0xf || (c->x86 == 6 && c->x86_model >= 0x0f))) > - flags->bm_control = 0; > + (c->x86 > 15 || (c->x86_vfm >= INTEL_CORE2_MEROM && c->x86_vfm <= INTEL_FAM6_LAST))) > + flags->bm_control = 0; > > if (c->x86_vendor == X86_VENDOR_CENTAUR) { > if (c->x86 > 6 || (c->x86 == 6 && c->x86_model == 0x0f && > -- > 2.43.0 >
diff --git a/arch/x86/include/asm/intel-family.h b/arch/x86/include/asm/intel-family.h index 9e6a13f03f0e..deb17c9c21e5 100644 --- a/arch/x86/include/asm/intel-family.h +++ b/arch/x86/include/asm/intel-family.h @@ -187,6 +187,9 @@ #define INTEL_XEON_PHI_KNL IFM(6, 0x57) /* Knights Landing */ #define INTEL_XEON_PHI_KNM IFM(6, 0x85) /* Knights Mill */ +/* Notational marker denoting the last Family 6 model */ +#define INTEL_FAM6_LAST IFM(6, 0xFF) + /* Family 15 - NetBurst */ #define INTEL_P4_WILLAMETTE IFM(15, 0x01) /* Also Xeon Foster */ #define INTEL_P4_PRESCOTT IFM(15, 0x03) diff --git a/arch/x86/kernel/acpi/cstate.c b/arch/x86/kernel/acpi/cstate.c index 5854f0b8f0f1..444602a0a3dd 100644 --- a/arch/x86/kernel/acpi/cstate.c +++ b/arch/x86/kernel/acpi/cstate.c @@ -13,6 +13,7 @@ #include <linux/sched.h> #include <acpi/processor.h> +#include <asm/cpu_device_id.h> #include <asm/cpuid.h> #include <asm/mwait.h> #include <asm/special_insns.h> @@ -47,12 +48,11 @@ void acpi_processor_power_init_bm_check(struct acpi_processor_flags *flags, /* * On all recent Intel platforms, ARB_DISABLE is a nop. * So, set bm_control to zero to indicate that ARB_DISABLE - * is not required while entering C3 type state on - * P4, Core and beyond CPUs + * is not required while entering C3 type state. */ if (c->x86_vendor == X86_VENDOR_INTEL && - (c->x86 > 0xf || (c->x86 == 6 && c->x86_model >= 0x0f))) - flags->bm_control = 0; + (c->x86 > 15 || (c->x86_vfm >= INTEL_CORE2_MEROM && c->x86_vfm <= INTEL_FAM6_LAST))) + flags->bm_control = 0; if (c->x86_vendor == X86_VENDOR_CENTAUR) { if (c->x86 > 6 || (c->x86 == 6 && c->x86_model == 0x0f &&