From patchwork Fri May 13 11:15:31 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lukas Wunner X-Patchwork-Id: 9090441 Return-Path: X-Original-To: patchwork-linux-pm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 4FDF8BF29F for ; Fri, 13 May 2016 11:16:24 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id A09BC20221 for ; Fri, 13 May 2016 11:16:22 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id A14A22021A for ; Fri, 13 May 2016 11:16:21 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752261AbcEMLQU (ORCPT ); Fri, 13 May 2016 07:16:20 -0400 Received: from mailout1.hostsharing.net ([83.223.95.204]:36501 "EHLO mailout1.hostsharing.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752538AbcEMLQU (ORCPT ); Fri, 13 May 2016 07:16:20 -0400 Received: from h08.hostsharing.net (h08.hostsharing.net [83.223.95.28]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mailout1.hostsharing.net (Postfix) with ESMTPS id 06FC51039814F; Fri, 13 May 2016 13:16:18 +0200 (CEST) Received: from localhost (6-38-90-81.adsl.cmo.de [81.90.38.6]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA (128/128 bits)) (No client certificate requested) by h08.hostsharing.net (Postfix) with ESMTPSA id 7557D603E03D; Fri, 13 May 2016 13:16:16 +0200 (CEST) X-Mailbox-Line: From 3e694101e5fa1551e07b5ecf92157087922e952f Mon Sep 17 00:00:00 2001 Message-Id: <3e694101e5fa1551e07b5ecf92157087922e952f.1463134231.git.lukas@wunner.de> In-Reply-To: References: From: Lukas Wunner Date: Fri, 13 May 2016 13:15:31 +0200 Subject: [PATCH v2 03/13] PCI: Add Thunderbolt portdrv service type To: linux-pci@vger.kernel.org, linux-pm@vger.kernel.org Cc: Andreas Noever Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org X-Spam-Status: No, score=-8.3 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP A Thunderbolt controller is a PCIe switch which, as defined in the PCIe spec, appears to the OS "as a collection of virtual PCI-to-PCI bridges". We're about to add support for Apple's nonstandard ACPI methods to power Thunderbolt controllers up and down. To facilitate that, allocate a port service for every PCI bridge belonging to a Thunderbolt controller. This port service might come in handy for other use cases, e.g. device initialization of Thunderbolt controllers. To understand when and how this port service will be allocated, consider the PCI devices exposed by a Thunderbolt host controller: (Root Port) ---- Upstream Bridge --+-- Downstream Bridge 0 ---- NHI +-- Downstream Bridge 1 -- +-- Downstream Bridge 2 -- ... The upstream and downstream bridges represent the PCIe switch and a Thunderbolt port service will be allocated for each of them. Hotplugged devices will appear behind the downstream bridges. The NHI (Native Host Interface) is a virtual PCI device to manage the switch fabric and is not relevant here. It uses class 0x88000, so it is not a PCIe port. Next, consider the PCI devices exposed by Thunderbolt controllers built into hotplugged devices: -- Upstream Bridge ---- Downstream Bridge ---- Hotplugged device Again, Thunderbolt port services will be allocated for the upstream and downstream bridge, but not for the hotplugged device, which might use e.g. class 0x20000 if it's a Thunderbolt Ethernet adapter. Signed-off-by: Lukas Wunner --- drivers/pci/pcie/portdrv.h | 2 +- drivers/pci/pcie/portdrv_core.c | 2 ++ include/linux/pcieport_if.h | 2 ++ 3 files changed, 5 insertions(+), 1 deletion(-) diff --git a/drivers/pci/pcie/portdrv.h b/drivers/pci/pcie/portdrv.h index 587aef3..a0d9973 100644 --- a/drivers/pci/pcie/portdrv.h +++ b/drivers/pci/pcie/portdrv.h @@ -11,7 +11,7 @@ #include -#define PCIE_PORT_DEVICE_MAXSERVICES 5 +#define PCIE_PORT_DEVICE_MAXSERVICES 6 /* * According to the PCI Express Base Specification 2.0, the indices of * the MSI-X table entries used by port services must not exceed 31 diff --git a/drivers/pci/pcie/portdrv_core.c b/drivers/pci/pcie/portdrv_core.c index d04fb58..8cd9db8 100644 --- a/drivers/pci/pcie/portdrv_core.c +++ b/drivers/pci/pcie/portdrv_core.c @@ -310,6 +310,8 @@ static int get_port_device_capability(struct pci_dev *dev) } if (pci_find_ext_capability(dev, PCI_EXT_CAP_ID_DPC)) services |= PCIE_PORT_SERVICE_DPC; + if (dev->is_thunderbolt) + services |= PCIE_PORT_SERVICE_TBT; return services; } diff --git a/include/linux/pcieport_if.h b/include/linux/pcieport_if.h index afcd130..d205bd6 100644 --- a/include/linux/pcieport_if.h +++ b/include/linux/pcieport_if.h @@ -23,6 +23,8 @@ #define PCIE_PORT_SERVICE_VC (1 << PCIE_PORT_SERVICE_VC_SHIFT) #define PCIE_PORT_SERVICE_DPC_SHIFT 4 /* Downstream Port Containment */ #define PCIE_PORT_SERVICE_DPC (1 << PCIE_PORT_SERVICE_DPC_SHIFT) +#define PCIE_PORT_SERVICE_TBT_SHIFT 5 /* Thunderbolt */ +#define PCIE_PORT_SERVICE_TBT (1 << PCIE_PORT_SERVICE_TBT_SHIFT) struct pcie_device { int irq; /* Service IRQ/MSI/MSI-X Vector */