From patchwork Fri Jun 2 08:50:38 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Geert Uytterhoeven X-Patchwork-Id: 13264901 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 84B95C7EE32 for ; Fri, 2 Jun 2023 08:52:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234964AbjFBIwT (ORCPT ); Fri, 2 Jun 2023 04:52:19 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51288 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234401AbjFBIvw (ORCPT ); Fri, 2 Jun 2023 04:51:52 -0400 Received: from xavier.telenet-ops.be (xavier.telenet-ops.be [IPv6:2a02:1800:120:4::f00:14]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7135D1720 for ; Fri, 2 Jun 2023 01:51:15 -0700 (PDT) Received: from ramsan.of.borg ([IPv6:2a02:1810:ac12:ed30:158c:2ccf:1f70:e136]) by xavier.telenet-ops.be with bizsmtp id 48qo2A0061tRZS8018qoDG; Fri, 02 Jun 2023 10:51:12 +0200 Received: from rox.of.borg ([192.168.97.57]) by ramsan.of.borg with esmtp (Exim 4.95) (envelope-from ) id 1q50UO-00BhYG-TJ; Fri, 02 Jun 2023 10:50:48 +0200 Received: from geert by rox.of.borg with local (Exim 4.95) (envelope-from ) id 1q50Ui-00APxY-0T; Fri, 02 Jun 2023 10:50:48 +0200 From: Geert Uytterhoeven To: Michael Turquette , Stephen Boyd , Yoshihiro Shimoda , Magnus Damm , Joerg Roedel , Robin Murphy Cc: Tomasz Figa , Sylwester Nawrocki , Will Deacon , Arnd Bergmann , Wolfram Sang , Dejin Zheng , Kai-Heng Feng , Nicholas Piggin , Heiko Carstens , Peter Zijlstra , Russell King , John Stultz , Thomas Gleixner , Tony Lindgren , Krzysztof Kozlowski , Tero Kristo , Ulf Hansson , "Rafael J . Wysocki" , Vincent Guittot , linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-renesas-soc@vger.kernel.org, linux-pm@vger.kernel.org, iommu@lists.linux.dev, linux-kernel@vger.kernel.org, Geert Uytterhoeven Subject: [PATCH v3 3/7] clk: renesas: cpg-mssr: Convert to readl_poll_timeout_atomic() Date: Fri, 2 Jun 2023 10:50:38 +0200 Message-Id: <832d29fd9aa3239ea949535309d2bdb003d40c9e.1685692810.git.geert+renesas@glider.be> X-Mailer: git-send-email 2.34.1 In-Reply-To: References: MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org Use readl_poll_timeout_atomic() instead of open-coding the same operation. As typically no retries are needed, 10 µs is a suitable timeout value. Signed-off-by: Geert Uytterhoeven --- Polling measurements done on R-Car M2-W, H3 ES2.0, M3-W, M3-N, E3, and V4H. v3: - New. --- drivers/clk/renesas/renesas-cpg-mssr.c | 31 +++++++++----------------- 1 file changed, 11 insertions(+), 20 deletions(-) diff --git a/drivers/clk/renesas/renesas-cpg-mssr.c b/drivers/clk/renesas/renesas-cpg-mssr.c index e9c0e341380e8f55..2772499d20165127 100644 --- a/drivers/clk/renesas/renesas-cpg-mssr.c +++ b/drivers/clk/renesas/renesas-cpg-mssr.c @@ -17,6 +17,7 @@ #include #include #include +#include #include #include #include @@ -196,8 +197,8 @@ static int cpg_mstp_clock_endisable(struct clk_hw *hw, bool enable) struct device *dev = priv->dev; u32 bitmask = BIT(bit); unsigned long flags; - unsigned int i; u32 value; + int error; dev_dbg(dev, "MSTP %u%02u/%pC %s\n", reg, bit, hw->clk, enable ? "ON" : "OFF"); @@ -228,19 +229,13 @@ static int cpg_mstp_clock_endisable(struct clk_hw *hw, bool enable) if (!enable || priv->reg_layout == CLK_REG_LAYOUT_RZ_A) return 0; - for (i = 1000; i > 0; --i) { - if (!(readl(priv->base + priv->status_regs[reg]) & bitmask)) - break; - cpu_relax(); - } - - if (!i) { + error = readl_poll_timeout_atomic(priv->base + priv->status_regs[reg], + value, !(value & bitmask), 0, 10); + if (error) dev_err(dev, "Failed to enable SMSTP %p[%d]\n", priv->base + priv->control_regs[reg], bit); - return -ETIMEDOUT; - } - return 0; + return error; } static int cpg_mstp_clock_enable(struct clk_hw *hw) @@ -896,8 +891,9 @@ static int cpg_mssr_suspend_noirq(struct device *dev) static int cpg_mssr_resume_noirq(struct device *dev) { struct cpg_mssr_priv *priv = dev_get_drvdata(dev); - unsigned int reg, i; + unsigned int reg; u32 mask, oldval, newval; + int error; /* This is the best we can do to check for the presence of PSCI */ if (!psci_ops.cpu_suspend) @@ -935,14 +931,9 @@ static int cpg_mssr_resume_noirq(struct device *dev) if (!mask) continue; - for (i = 1000; i > 0; --i) { - oldval = readl(priv->base + priv->status_regs[reg]); - if (!(oldval & mask)) - break; - cpu_relax(); - } - - if (!i) + error = readl_poll_timeout_atomic(priv->base + priv->status_regs[reg], + oldval, !(oldval & mask), 0, 10); + if (error) dev_warn(dev, "Failed to enable SMSTP%u[0x%x]\n", reg, oldval & mask); }