From patchwork Fri Jun 2 08:50:40 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Geert Uytterhoeven X-Patchwork-Id: 13264905 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id F268DC7EE2A for ; Fri, 2 Jun 2023 08:52:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234993AbjFBIwj (ORCPT ); Fri, 2 Jun 2023 04:52:39 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50994 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234902AbjFBIv5 (ORCPT ); Fri, 2 Jun 2023 04:51:57 -0400 Received: from michel.telenet-ops.be (michel.telenet-ops.be [IPv6:2a02:1800:110:4::f00:18]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D2DAA172C for ; Fri, 2 Jun 2023 01:51:15 -0700 (PDT) Received: from ramsan.of.borg ([IPv6:2a02:1810:ac12:ed30:158c:2ccf:1f70:e136]) by michel.telenet-ops.be with bizsmtp id 48qo2A00B1tRZS8068qoZc; Fri, 02 Jun 2023 10:51:13 +0200 Received: from rox.of.borg ([192.168.97.57]) by ramsan.of.borg with esmtp (Exim 4.95) (envelope-from ) id 1q50UO-00BhYO-Uv; Fri, 02 Jun 2023 10:50:48 +0200 Received: from geert by rox.of.borg with local (Exim 4.95) (envelope-from ) id 1q50Ui-00APxh-20; Fri, 02 Jun 2023 10:50:48 +0200 From: Geert Uytterhoeven To: Michael Turquette , Stephen Boyd , Yoshihiro Shimoda , Magnus Damm , Joerg Roedel , Robin Murphy Cc: Tomasz Figa , Sylwester Nawrocki , Will Deacon , Arnd Bergmann , Wolfram Sang , Dejin Zheng , Kai-Heng Feng , Nicholas Piggin , Heiko Carstens , Peter Zijlstra , Russell King , John Stultz , Thomas Gleixner , Tony Lindgren , Krzysztof Kozlowski , Tero Kristo , Ulf Hansson , "Rafael J . Wysocki" , Vincent Guittot , linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-renesas-soc@vger.kernel.org, linux-pm@vger.kernel.org, iommu@lists.linux.dev, linux-kernel@vger.kernel.org, Geert Uytterhoeven Subject: [PATCH v3 5/7] clk: renesas: rzg2l: Convert to readl_poll_timeout_atomic() Date: Fri, 2 Jun 2023 10:50:40 +0200 Message-Id: <900543d4b9abc1004e6aecdb676f23e5508ae96f.1685692810.git.geert+renesas@glider.be> X-Mailer: git-send-email 2.34.1 In-Reply-To: References: MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org Use readl_poll_timeout_atomic() instead of open-coding the same operation. As typically no retries are needed, 10 µs is a suitable timeout value. Signed-off-by: Geert Uytterhoeven --- Polling measurements done on RZ/Five. v3: - New. --- drivers/clk/renesas/rzg2l-cpg.c | 16 +++++----------- 1 file changed, 5 insertions(+), 11 deletions(-) diff --git a/drivers/clk/renesas/rzg2l-cpg.c b/drivers/clk/renesas/rzg2l-cpg.c index ca8b921c77625317..bc623515ad843cf5 100644 --- a/drivers/clk/renesas/rzg2l-cpg.c +++ b/drivers/clk/renesas/rzg2l-cpg.c @@ -903,9 +903,9 @@ static int rzg2l_mod_clock_endisable(struct clk_hw *hw, bool enable) unsigned int reg = clock->off; struct device *dev = priv->dev; unsigned long flags; - unsigned int i; u32 bitmask = BIT(clock->bit); u32 value; + int error; if (!clock->off) { dev_dbg(dev, "%pC does not support ON/OFF\n", hw->clk); @@ -930,19 +930,13 @@ static int rzg2l_mod_clock_endisable(struct clk_hw *hw, bool enable) if (!priv->info->has_clk_mon_regs) return 0; - for (i = 1000; i > 0; --i) { - if (((readl(priv->base + CLK_MON_R(reg))) & bitmask)) - break; - cpu_relax(); - } - - if (!i) { + error = readl_poll_timeout_atomic(priv->base + CLK_MON_R(reg), value, + value & bitmask, 0, 10); + if (error) dev_err(dev, "Failed to enable CLK_ON %p\n", priv->base + CLK_ON_R(reg)); - return -ETIMEDOUT; - } - return 0; + return error; } static int rzg2l_mod_clock_enable(struct clk_hw *hw)