From patchwork Mon Apr 10 18:52:23 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sathyanarayanan Kuppuswamy X-Patchwork-Id: 9674015 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 63776600CB for ; Mon, 10 Apr 2017 18:56:06 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 58CD7284A5 for ; Mon, 10 Apr 2017 18:56:06 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 4D61C284D3; Mon, 10 Apr 2017 18:56:06 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id CF954284A5 for ; Mon, 10 Apr 2017 18:56:05 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752374AbdDJS4D (ORCPT ); Mon, 10 Apr 2017 14:56:03 -0400 Received: from mga14.intel.com ([192.55.52.115]:55806 "EHLO mga14.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752047AbdDJS4B (ORCPT ); Mon, 10 Apr 2017 14:56:01 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=intel.com; i=@intel.com; q=dns/txt; s=intel; t=1491850561; x=1523386561; h=from:to:cc:subject:date:message-id; bh=NN9VuqUzkiT5CO7d+soCsnyHHsZKhPFfFo15fDfvHSU=; b=m+LmH7QKxcWPW+31il6jgTDk58MZG+uLBGGUhfCC9XXcrHfy2tfFhuQf FbYnmVRyfSuOPwgPk+kmylsEzV4XPw==; Received: from orsmga004.jf.intel.com ([10.7.209.38]) by fmsmga103.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 10 Apr 2017 11:56:00 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.37,182,1488873600"; d="scan'208";a="75884119" Received: from skuppusw-desk.jf.intel.com ([10.7.198.92]) by orsmga004.jf.intel.com with ESMTP; 10 Apr 2017 11:56:00 -0700 From: sathyanarayanan.kuppuswamy@linux.intel.com To: gnurou@gmail.com, linus.walleij@linaro.org, edubezval@gmail.com, dvhart@infradead.org, rui.zhang@intel.com, lee.jones@linaro.org, andy@infradead.org, hdegoede@redhat.com Cc: linux-gpio@vger.kernel.org, platform-driver-x86@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, sathyaosid@gmail.com, Kuppuswamy Sathyanarayanan Subject: [PATCH v1 1/7] mfd: intel_soc_pmic_bxtwc: fix TMU interrupt index Date: Mon, 10 Apr 2017 11:52:23 -0700 Message-Id: X-Mailer: git-send-email 2.7.4 Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Kuppuswamy Sathyanarayanan TMU interrupts are registered as a separate interrupt chip, and hence it should start its interrupt index(BXTWC_TMU_IRQ) number from 0. But currently, BXTWC_TMU_IRQ is defined as part of enum bxtwc_irqs_level2 and its index value is 11. Since this index value is used when calculating .num_irqs of regmap_irq_chip_tmu, it incorrectly reports number of irqs as 12 instead of actual value of 1. static const struct regmap_irq bxtwc_regmap_irqs_tmu[] = { REGMAP_IRQ_REG(BXTWC_TMU_IRQ, 0, 0x06), }; static struct regmap_irq_chip bxtwc_regmap_irq_chip_tmu = { .name = "bxtwc_irq_chip_tmu", .status_base = BXTWC_TMUIRQ, .mask_base = BXTWC_MTMUIRQ, .irqs = bxtwc_regmap_irqs_tmu, .num_irqs = ARRAY_SIZE(bxtwc_regmap_irqs_tmu), .num_regs = 1, }; This patch fixes this issue by creating new enum of tmu irqs and resetting its starting index to 0. Signed-off-by: Kuppuswamy Sathyanarayanan --- drivers/mfd/intel_soc_pmic_bxtwc.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/mfd/intel_soc_pmic_bxtwc.c b/drivers/mfd/intel_soc_pmic_bxtwc.c index 699c8c7..bb18e20 100644 --- a/drivers/mfd/intel_soc_pmic_bxtwc.c +++ b/drivers/mfd/intel_soc_pmic_bxtwc.c @@ -94,7 +94,10 @@ enum bxtwc_irqs_level2 { BXTWC_GPIO0_IRQ, BXTWC_GPIO1_IRQ, BXTWC_CRIT_IRQ, - BXTWC_TMU_IRQ, +}; + +enum bxtwc_irqs_tmu { + BXTWC_TMU_IRQ = 0, }; static const struct regmap_irq bxtwc_regmap_irqs[] = {