From patchwork Sun Jan 15 20:03:45 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lukas Wunner X-Patchwork-Id: 9517669 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id BB85060209 for ; Sun, 15 Jan 2017 20:05:19 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 78444283FE for ; Sun, 15 Jan 2017 20:05:18 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 6CC3F283FB; Sun, 15 Jan 2017 20:05:18 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 0C8A2283F7 for ; Sun, 15 Jan 2017 20:05:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751469AbdAOUFE (ORCPT ); Sun, 15 Jan 2017 15:05:04 -0500 Received: from mailout1.hostsharing.net ([83.223.95.204]:53127 "EHLO mailout1.hostsharing.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751270AbdAOUFE (ORCPT ); Sun, 15 Jan 2017 15:05:04 -0500 Received: from h08.hostsharing.net (h08.hostsharing.net [83.223.95.28]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mailout1.hostsharing.net (Postfix) with ESMTPS id D76A5101903B9; Sun, 15 Jan 2017 21:04:59 +0100 (CET) Received: from localhost (3-38-90-81.adsl.cmo.de [81.90.38.3]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA (128/128 bits)) (No client certificate requested) by h08.hostsharing.net (Postfix) with ESMTPSA id 56E3860AEB1B; Sun, 15 Jan 2017 21:04:58 +0100 (CET) X-Mailbox-Line: From be633737115c0be241fccd75bc136dd1da72c1b5 Mon Sep 17 00:00:00 2001 Message-Id: In-Reply-To: References: From: Lukas Wunner Date: Sun, 15 Jan 2017 21:03:45 +0100 Subject: [PATCH v5 3/8] PCI: Don't block runtime PM for Thunderbolt host hotplug ports To: Greg Kroah-Hartman , linux-kernel@vger.kernel.org Cc: Andreas Noever , linux-pci@vger.kernel.org, linux-pm@vger.kernel.org, Bjorn Helgaas , "Rafael J. Wysocki" , Mika Westerberg Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Hotplug ports generally block their parents from suspending to D3hot as otherwise their interrupts couldn't be delivered. An exception are Thunderbolt host controllers: They have a separate GPIO pin to side-band signal plug events even if the controller is powered down or its parent ports are suspended to D3. They can be told apart from Thunderbolt controllers in attached devices by checking if they're situated below a non-Thunderbolt device (typically a root port, or the downstream port of a PCIe switch in the case of the MacPro6,1). To enable runtime PM for Thunderbolt on the Mac, the downstream bridges of a host controller must not block runtime PM on the upstream bridge as power to the chip is only cut once the upstream bridge has suspended. Amend the condition in pci_dev_check_d3cold() accordingly. This change does not impact non-Macs as their Thunderbolt hotplug ports are handled by the firmware rather than natively by the OS: The hotplug ports are not allowed to suspend in pci_bridge_d3_possible() and keep their parent ports awake all the time. Consequently it is meaningless whether they block runtime PM on their parent ports or not. Cc: Mika Westerberg Cc: Rafael J. Wysocki Cc: Andreas Noever Cc: Tomas Winkler Cc: Amir Levy Signed-off-by: Lukas Wunner Reviewed-by: Mika Westerberg --- drivers/pci/pci.c | 20 +++++++++++++++++++- 1 file changed, 19 insertions(+), 1 deletion(-) diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c index 8ed098db82e1..e7a354cd13ce 100644 --- a/drivers/pci/pci.c +++ b/drivers/pci/pci.c @@ -2269,6 +2269,24 @@ bool pci_bridge_d3_possible(struct pci_dev *bridge) return false; } +static bool pci_hotplug_bridge_may_wakeup(struct pci_dev *dev) +{ + struct pci_dev *parent, *grandparent; + + /* + * Thunderbolt host controllers have a pin to side-band signal + * plug events. Their hotplug ports are recognizable by having + * a non-Thunderbolt device as grandparent. + */ + if (dev->is_thunderbolt && + (parent = pci_upstream_bridge(dev)) && + (grandparent = pci_upstream_bridge(parent)) && + !grandparent->is_thunderbolt) + return true; + + return false; +} + static int pci_dev_check_d3cold(struct pci_dev *dev, void *data) { bool *d3cold_ok = data; @@ -2284,7 +2302,7 @@ static int pci_dev_check_d3cold(struct pci_dev *dev, void *data) !pci_power_manageable(dev) || /* Hotplug interrupts cannot be delivered if the link is down. */ - dev->is_hotplug_bridge) + (dev->is_hotplug_bridge && !pci_hotplug_bridge_may_wakeup(dev))) *d3cold_ok = false;