Message ID | ca2e027db5bd990ffebed9086db3dac335afdf64.1537448058.git.yu.c.chen@intel.com (mailing list archive) |
---|---|
State | Mainlined |
Delegated to: | Rafael Wysocki |
Headers | show |
Series | Backport several fixes from 64bits to 32bits hibernation | expand |
On Fri 2018-09-21 14:27:51, Chen Yu wrote: > From: Zhimin Gu <kookoo.gu@intel.com> > > This is to reuse the temp_pgt for both 32bit and 64bit > system. > > No functional change. I'd say this is functional change. "No functional change" normally means "compiled code has not changed".
diff --git a/arch/x86/power/hibernate_32.c b/arch/x86/power/hibernate_32.c index f82fbd279d08..a44bdada4e4e 100644 --- a/arch/x86/power/hibernate_32.c +++ b/arch/x86/power/hibernate_32.c @@ -156,6 +156,8 @@ asmlinkage int swsusp_arch_resume(void) if (error) return error; + temp_pgt = __pa(resume_pg_dir); + /* We have got enough memory and from now on we cannot recover */ restore_image(); return 0; diff --git a/arch/x86/power/hibernate_asm_32.S b/arch/x86/power/hibernate_asm_32.S index 671d38d0d931..f0627cf30a36 100644 --- a/arch/x86/power/hibernate_asm_32.S +++ b/arch/x86/power/hibernate_asm_32.S @@ -33,8 +33,7 @@ ENDPROC(swsusp_arch_suspend) ENTRY(restore_image) movl mmu_cr4_features, %ecx - movl resume_pg_dir, %eax - subl $__PAGE_OFFSET, %eax + movl temp_pgt, %eax movl %eax, %cr3 jecxz 1f # cr4 Pentium and higher, skip if zero