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dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.117.161 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.117.161; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (216.228.117.161) by CH3PEPF0000000A.mail.protection.outlook.com (10.167.244.37) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7633.15 via Frontend Transport; Tue, 28 May 2024 09:13:22 +0000 Received: from rnnvmail201.nvidia.com (10.129.68.8) by mail.nvidia.com (10.129.200.67) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.4; Tue, 28 May 2024 02:13:10 -0700 Received: from nps-server-23.mtl.labs.mlnx (10.126.230.35) by rnnvmail201.nvidia.com (10.129.68.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.4; Tue, 28 May 2024 02:13:06 -0700 From: Shay Drory To: , , , , , , CC: , , , , , Shay Drory Subject: [PATCH net-next v5 0/2] Introduce auxiliary bus IRQs sysfs Date: Tue, 28 May 2024 12:11:42 +0300 Message-ID: <20240528091144.112829-1-shayd@nvidia.com> X-Mailer: git-send-email 2.38.1 Precedence: bulk X-Mailing-List: linux-rdma@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: rnnvmail203.nvidia.com (10.129.68.9) To rnnvmail201.nvidia.com (10.129.68.8) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CH3PEPF0000000A:EE_|MN6PR12MB8492:EE_ X-MS-Office365-Filtering-Correlation-Id: 9f085d2c-43e0-4ad4-d31f-08dc7ef66c9c X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230031|36860700004|82310400017|1800799015|7416005|376005; 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X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 28 May 2024 09:13:22.7320 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 9f085d2c-43e0-4ad4-d31f-08dc7ef66c9c X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.161];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CH3PEPF0000000A.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN6PR12MB8492 Today, PCI PFs and VFs, which are anchored on the PCI bus, display their IRQ information in the /msi_irqs/ sysfs files. PCI subfunctions (SFs) are similar to PFs and VFs and these SFs are anchored on the auxiliary bus. However, these PCI SFs lack such IRQ information on the auxiliary bus, leaving users without visibility into which IRQs are used by the SFs. This absence makes it impossible to debug situations and to understand the source of interrupts/SFs for performance tuning and debug. Additionally, the SFs are multifunctional devices supporting RDMA, network devices, clocks, and more, similar to their peer PCI PFs and VFs. Therefore, it is desirable to have SFs' IRQ information available at the bus/device level. To overcome the above limitations, this short series extends the auxiliary bus to display IRQ information in sysfs, similar to that of PFs and VFs. It adds an 'irqs' directory under the auxiliary device and includes an sysfs file within it. Sometimes, the PCI SF auxiliary devices share the IRQ with other SFs, a detail that is also not available to the users. Consequently, this file indicates whether the IRQ is 'exclusive' or 'shared'. This 'irqs' directory extenstion is optional, i.e. only for PCI SFs the sysfs irq information is optionally exposed. For example: $ ls /sys/bus/auxiliary/devices/mlx5_core.sf.1/irqs/ 50 51 52 53 54 55 56 57 58 $ cat /sys/bus/auxiliary/devices/mlx5_core.sf.1/irqs/52 exclusive Patch summary: ============== patch-1 adds auxiliary bus to support irqs used by auxiliary device patch-2 mlx5 driver using exposing irqs for PCI SF devices via auxiliary bus --- v4->v5: - addressed comments from Greg in patch #1. v3->4: - addressed comments from Przemek in patch #1. v2->v3: - addressed comments from Parav and Przemek in patch #1. - fixed a bug in patch #2. v1->v2: - addressed comments from Greg, Simon H and kernel test boot in patch #1. Shay Drory (2): driver core: auxiliary bus: show auxiliary device IRQs net/mlx5: Expose SFs IRQs Documentation/ABI/testing/sysfs-bus-auxiliary | 14 ++ drivers/base/auxiliary.c | 165 +++++++++++++++++- drivers/net/ethernet/mellanox/mlx5/core/eq.c | 6 +- .../mellanox/mlx5/core/irq_affinity.c | 15 +- .../ethernet/mellanox/mlx5/core/mlx5_core.h | 6 + .../ethernet/mellanox/mlx5/core/mlx5_irq.h | 12 +- .../net/ethernet/mellanox/mlx5/core/pci_irq.c | 12 +- .../ethernet/mellanox/mlx5/core/sf/dev/dev.c | 16 +- include/linux/auxiliary_bus.h | 24 ++- 9 files changed, 247 insertions(+), 23 deletions(-) create mode 100644 Documentation/ABI/testing/sysfs-bus-auxiliary