From patchwork Wed May 4 12:21:01 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lijun Ou X-Patchwork-Id: 9012931 Return-Path: X-Original-To: patchwork-linux-rdma@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 705EE9F1C1 for ; Wed, 4 May 2016 12:08:18 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 660AE2039D for ; Wed, 4 May 2016 12:08:17 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 40E8C2039C for ; Wed, 4 May 2016 12:08:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753028AbcEDMIL (ORCPT ); Wed, 4 May 2016 08:08:11 -0400 Received: from szxga01-in.huawei.com ([58.251.152.64]:40439 "EHLO szxga01-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752914AbcEDMIE (ORCPT ); Wed, 4 May 2016 08:08:04 -0400 Received: from 172.24.1.36 (EHLO szxeml426-hub.china.huawei.com) ([172.24.1.36]) by szxrg01-dlp.huawei.com (MOS 4.3.7-GA FastPath queued) with ESMTP id DJZ45738; Wed, 04 May 2016 20:07:55 +0800 (CST) Received: from linux-ioko.site (10.71.200.31) by szxeml426-hub.china.huawei.com (10.82.67.181) with Microsoft SMTP Server id 14.3.235.1; Wed, 4 May 2016 20:07:45 +0800 From: Lijun Ou To: , , , , , , CC: , , , , , , , , , , , Subject: [PATCH v7 04/21] IB/hns: Add RoCE engine reset function Date: Wed, 4 May 2016 20:21:01 +0800 Message-ID: <1462364478-10808-5-git-send-email-oulijun@huawei.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1462364478-10808-1-git-send-email-oulijun@huawei.com> References: <1462364478-10808-1-git-send-email-oulijun@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.71.200.31] X-CFilter-Loop: Reflected X-Mirapoint-Virus-RAPID-Raw: score=unknown(0), refid=str=0001.0A020201.5729E61E.02F3, ss=1, re=0.000, recu=0.000, reip=0.000, cl=1, cld=1, fgs=0, ip=0.0.0.0, so=2013-06-18 04:22:30, dmn=2013-03-21 17:37:32 X-Mirapoint-Loop-Id: ef146de18b04eaf39d4e00d6b5706805 Sender: linux-rdma-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-rdma@vger.kernel.org X-Spam-Status: No, score=-9.0 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch mainly added reset flow of RoCE engine in RoCE driver. It is necessary when RoCE is loaded and removed. Signed-off-by: Wei Hu Signed-off-by: Nenglong Zhao Signed-off-by: Lijun Ou --- drivers/infiniband/hw/hns/hns_roce_device.h | 7 ++++ drivers/infiniband/hw/hns/hns_roce_hw_v1.c | 54 +++++++++++++++++++++++++++++ drivers/infiniband/hw/hns/hns_roce_hw_v1.h | 17 +++++++++ drivers/infiniband/hw/hns/hns_roce_main.c | 16 ++++++++- 4 files changed, 93 insertions(+), 1 deletion(-) create mode 100644 drivers/infiniband/hw/hns/hns_roce_hw_v1.c create mode 100644 drivers/infiniband/hw/hns/hns_roce_hw_v1.h diff --git a/drivers/infiniband/hw/hns/hns_roce_device.h b/drivers/infiniband/hw/hns/hns_roce_device.h index b48f518..b0b8f73 100644 --- a/drivers/infiniband/hw/hns/hns_roce_device.h +++ b/drivers/infiniband/hw/hns/hns_roce_device.h @@ -33,6 +33,10 @@ struct hns_roce_caps { u8 num_ports; }; +struct hns_roce_hw { + int (*reset)(struct hns_roce_dev *hr_dev, bool enable); +}; + struct hns_roce_dev { struct ib_device ib_dev; struct platform_device *pdev; @@ -44,6 +48,9 @@ struct hns_roce_dev { int cmd_mod; int loop_idc; + struct hns_roce_hw *hw; }; +extern struct hns_roce_hw hns_roce_hw_v1; + #endif /* _HNS_ROCE_DEVICE_H */ diff --git a/drivers/infiniband/hw/hns/hns_roce_hw_v1.c b/drivers/infiniband/hw/hns/hns_roce_hw_v1.c new file mode 100644 index 0000000..1128a4c --- /dev/null +++ b/drivers/infiniband/hw/hns/hns_roce_hw_v1.c @@ -0,0 +1,54 @@ +/* + * Copyright (c) 2016 Hisilicon Limited. + * + * Authors: Wei Hu + * Authors: Nenglong Zhao + * Authors: Lijun Ou + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + */ + +#include +#include +#include +#include +#include +#include "hns_roce_device.h" +#include "hns_roce_hw_v1.h" + +/** + * hns_roce_v1_reset - reset roce + * @hr_dev: roce device struct pointer + * @enable: true -- drop reset, false -- reset + * return 0 - success , negative --fail + */ +int hns_roce_v1_reset(struct hns_roce_dev *hr_dev, bool enable) +{ + struct device_node *dsaf_node; + struct device *dev = &hr_dev->pdev->dev; + struct device_node *np = dev->of_node; + int ret; + + dsaf_node = of_parse_phandle(np, "dsaf-handle", 0); + + if (!enable) { + ret = hns_dsaf_roce_reset(&dsaf_node->fwnode, false); + } else { + ret = hns_dsaf_roce_reset(&dsaf_node->fwnode, false); + if (ret) + return ret; + + msleep(SLEEP_TIME_INTERVAL); + ret = hns_dsaf_roce_reset(&dsaf_node->fwnode, true); + } + + return ret; +} + +struct hns_roce_hw hns_roce_hw_v1 = { + .reset = hns_roce_v1_reset, +}; diff --git a/drivers/infiniband/hw/hns/hns_roce_hw_v1.h b/drivers/infiniband/hw/hns/hns_roce_hw_v1.h new file mode 100644 index 0000000..b58efea --- /dev/null +++ b/drivers/infiniband/hw/hns/hns_roce_hw_v1.h @@ -0,0 +1,17 @@ +/* + * Copyright (c) 2016 Hisilicon Limited. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#ifndef _HNS_ROCE_HW_V1_H +#define _HNS_ROCE_HW_V1_H + +#define SLEEP_TIME_INTERVAL 20 + +extern int hns_dsaf_roce_reset(struct fwnode_handle *dsaf_fwnode, bool enable); + +#endif diff --git a/drivers/infiniband/hw/hns/hns_roce_main.c b/drivers/infiniband/hw/hns/hns_roce_main.c index 1616148..a6f7147 100644 --- a/drivers/infiniband/hw/hns/hns_roce_main.c +++ b/drivers/infiniband/hw/hns/hns_roce_main.c @@ -53,7 +53,9 @@ int hns_roce_get_cfg(struct hns_roce_dev *hr_dev) struct platform_device *pdev = NULL; struct resource *res; - if (!of_device_is_compatible(np, "hisilicon,hns-roce-v1")) { + if (of_device_is_compatible(np, "hisilicon,hns-roce-v1")) { + hr_dev->hw = &hns_roce_hw_v1; + } else { dev_err(dev, "device no compatible!\n"); return -EINVAL; } @@ -98,6 +100,10 @@ int hns_roce_get_cfg(struct hns_roce_dev *hr_dev) return 0; } +int hns_roce_engine_reset(struct hns_roce_dev *hr_dev, bool enable) +{ + return hr_dev->hw->reset(hr_dev, enable); +} /** * hns_roce_probe - RoCE driver entrance * @pdev: pointer to platform device @@ -138,6 +144,12 @@ static int hns_roce_probe(struct platform_device *pdev) goto error_failed_get_cfg; } + ret = hns_roce_engine_reset(hr_dev, true); + if (ret) { + dev_err(dev, "Reset roce engine failed!\n"); + goto error_failed_get_cfg; + } + error_failed_get_cfg: ib_dealloc_device(&hr_dev->ib_dev); @@ -152,6 +164,8 @@ static int hns_roce_remove(struct platform_device *pdev) { struct hns_roce_dev *hr_dev = platform_get_drvdata(pdev); + (void)hns_roce_engine_reset(hr_dev, false); + ib_dealloc_device(&hr_dev->ib_dev); return 0;