From patchwork Tue Jul 12 19:36:34 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Adit Ranadive X-Patchwork-Id: 9226065 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 47BB760868 for ; Tue, 12 Jul 2016 19:38:01 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 342592756B for ; Tue, 12 Jul 2016 19:38:01 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 25C1D27FA2; Tue, 12 Jul 2016 19:38:01 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id B12812756B for ; Tue, 12 Jul 2016 19:37:59 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751650AbcGLThp (ORCPT ); Tue, 12 Jul 2016 15:37:45 -0400 Received: from ex13-edg-ou-001.vmware.com ([208.91.0.189]:4610 "EHLO EX13-EDG-OU-001.vmware.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751620AbcGLThn (ORCPT ); Tue, 12 Jul 2016 15:37:43 -0400 Received: from sc9-mailhost1.vmware.com (10.113.161.71) by EX13-EDG-OU-001.vmware.com (10.113.208.155) with Microsoft SMTP Server id 15.0.1156.6; Tue, 12 Jul 2016 12:37:19 -0700 Received: from EX13-CAS-005.vmware.com (ex13-cas-005.vmware.com [10.113.191.55]) by sc9-mailhost1.vmware.com (Postfix) with ESMTP id DDA3618756; Tue, 12 Jul 2016 12:37:42 -0700 (PDT) Received: from EX13-MBX-034.vmware.com (10.113.191.74) by EX13-MBX-019.vmware.com (10.113.191.39) with Microsoft SMTP Server (TLS) id 15.0.1156.6; Tue, 12 Jul 2016 12:37:42 -0700 Received: from EX13-CAS-002.vmware.com (10.113.191.52) by EX13-MBX-034.vmware.com (10.113.191.74) with Microsoft SMTP Server (TLS) id 15.0.1156.6; Tue, 12 Jul 2016 12:37:42 -0700 Received: from NAM02-SN1-obe.outbound.protection.outlook.com (10.113.170.11) by EX13-CAS-002.vmware.com (10.113.191.52) with Microsoft SMTP Server (TLS) id 15.0.1156.6 via Frontend Transport; Tue, 12 Jul 2016 12:37:42 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=onevmw.onmicrosoft.com; s=selector1-vmware-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version; bh=lfkD3PDpUQFKEx2XmxrF01fK//+s2ZivAKaFA98JNlA=; b=XN7BsheEycgW6n2LsGvvHMpx0w/ZfjrlZLAYgkmeXxTjszwcDPXllMW5pDqJTLCxq7v1LSGX2Q9hOvsa0Pi56aT+CGvrjXzM2uqn9wnvP+/6ZnQQMz9e+vnBXFec+wy2QYWe4GOZq8zp1d/04iAtVpx3pmgmikcPFjRQ6FiA+nE= Authentication-Results: spf=none (sender IP is ) smtp.mailfrom=aditr@vmware.com; Received: from promb-2s-dhcp95-136.eng.vmware.com (208.91.1.34) by BLUPR0501MB834.namprd05.prod.outlook.com (10.141.251.148) with Microsoft SMTP Server (TLS) id 15.1.539.14; Tue, 12 Jul 2016 19:37:30 +0000 From: Adit Ranadive To: , , CC: Adit Ranadive , , , , Subject: [PATCH v2 04/15] IB/pvrdma: Add the paravirtual RDMA device specification Date: Tue, 12 Jul 2016 12:36:34 -0700 Message-ID: <1468352205-9137-5-git-send-email-aditr@vmware.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1468352205-9137-1-git-send-email-aditr@vmware.com> References: <1468352205-9137-1-git-send-email-aditr@vmware.com> MIME-Version: 1.0 X-Originating-IP: [208.91.1.34] X-ClientProxiedBy: SN1PR10CA0055.namprd10.prod.outlook.com (10.164.10.151) To BLUPR0501MB834.namprd05.prod.outlook.com (10.141.251.148) X-MS-Office365-Filtering-Correlation-Id: b86060c4-6ed3-430a-3be1-08d3aa8bf78f X-Microsoft-Exchange-Diagnostics: 1; BLUPR0501MB834; 2:T91DKTNh3jOfzZG+RNe+/m8EV2xq5ho+gzZr8245qgsDM1t0W8Eg6iuo715w/G/A5YF6HRwa3RHoaYVoVSb2zU0VesSpjiubb2Jp+9S45sxLfAyB8zqMZJkl5tUcxdXfQTXYlrG55KTm68GAIvGWAP6v0xXPOauusdNOfxRVzo4hM8FPcxN/Fm1PH6Q9G1Kp; 3:n2PcmZiQLiaz8myu8lAUQlvxxk38zPhb1mA3R3RsrrUYnRjmdy5nvVxgy5m7sNYdN6oqy9VQI+Aws2hHsJTSu1e/pBMp7Vqd18hYhlhncS6n72tLIIKbg3zYIDGUKWSL; 25:w0xjigwOEYstC0H0txU+J0ptpQ22We42cfttEmxZWJK4bRAjEgKYt8/NRzd0AIo0l0UKXx7CLmDbPDd+uMxKDXpAS3rdrNmKHorh6oTEkuo5DzxH9FGEQRvwikij/qh9nJFtpunbnzW2+zH+lHPqaH8t+OE8GCFzlpj9QbOsuxgZcsGeAFcr6oG9uhaYceLkF8ezd/AH2GjLbBe0a+vrhabkQOHSjsLKviyVGTbVJ34IC7Y+P7AeOjnY49H0+BM6v+pNDZD0xwelvlMF0Z8mUB364tMziFQldn9vGze1c2mbuGsMPhku9kUgREDV0CMLv9ZLKRNPNxvVQbNJXfKyvRtct7Sov7mgWT0yxpWHnENVOoUKSITJYvojo+Bp/GKsKGzxBZUfkH+6r3wg9usAqiSIV3hFN887fB0b2SChWbs= X-Microsoft-Antispam: UriScan:;BCL:0;PCL:0;RULEID:;SRVR:BLUPR0501MB834; X-Microsoft-Exchange-Diagnostics: 1; BLUPR0501MB834; 31:1ZxlcXWj2dYi4FPUuL8Tp3PoYJzfnm7rwRRJPj5DMylAJqjnWcJdWSvNgG7burXVuciG2YpYOjdHgSji3a2upJBIHyqHkF7bgR1nvwGYCRAf5NrQfXCevAP5jScG+ChXzeP6YsOSaZCimcHiSWXkwD12M45kBouV1dNg6fMug8ryTNqC3naSfnfBkNRzf4EXzDDKkf75S8ImUHyjgHbELA==; 20:WB7TZfNlrdiQhptidMyP66OzxQnfdMiPZnagidqWZt937ZJofzJj1pnJOdtl7pUi7YVeg4AWwQ1T8ZZtVMVSxK0vzbHU67WYFRC1xa7ZZuWB/8Q7V9/ztZcQKDkJmfE8EzguSLcUraDpROes8F42BN/7Nj6/SrSdyk+YR0V4icCRd2rjTlV9nAKLg1di1KGOyhdLElZ9pPm05pPOgPaXh4w44b95LfV8NX3oHba3NO9Fht6Ui6hKxSTi2jcF3WOD; 4:AHK9lKndUwZ3U3tYmU5i30aKXIChkuTe+T02bTiAzAPXtsF8hXCjig/H5UzWQcer6iqFrtfRy0x46sYtotvHD9FPrapSBh0J9v88kH/mIJJBIinP3bkmS+X9zphiBPH4vCi8zqQaJgG5/upgCwJO8cw77UFnbYipL57hWY5eMp2AAdhFsnUeBHD4i7wB5WALs2w2+Hx8zZfWhWoKj+CVxSG1L3obW7z1ZhiSFPCID2t9Ac8c1ibHeOa1eiNR678Hjh5zKuwILmook5IunGMrISMvQ7LuAnM6RM6sTbCAWEXrGVFJF8eL4D4jbLtaMe6W+TQayAtVMKrpRbG0777akhKBd6Io3JS4fRoI98DOIEd/ST7DfWLYv0MidpjN+z6xvrxoj2x+a7w6XF6EJ8xigM5ClNN5qHaRoYpkVpSGjf4Ns096P6r58G2I25yMCTvfuSZ6Ak3gZ C39Q8rsO3496Ysfl2bQ9ktlnHbtGufx+F 0= X-Microsoft-Antispam-PRVS: X-Exchange-Antispam-Report-Test: UriScan:(250305191791016)(61668805478150)(22074186197030); X-Exchange-Antispam-Report-CFA-Test: BCL:0; PCL:0; RULEID:(601004)(2401047)(5005006)(8121501046)(10201501046)(3002001); SRVR:BLUPR0501MB834; BCL:0; PCL:0; RULEID:; SRVR:BLUPR0501MB834; X-Forefront-PRVS: 0001227049 X-Forefront-Antispam-Report: SFV:NSPM; SFS:(10009020)(4630300001)(6009001)(7916002)(199003)(189002)(305945005)(575784001)(7736002)(50226002)(86362001)(4326007)(2906002)(42186005)(7846002)(68736007)(33646002)(229853001)(106356001)(50986999)(586003)(3846002)(2201001)(6116002)(15975445007)(97736004)(81166006)(81156014)(48376002)(5890100001)(36756003)(5003940100001)(19580395003)(19580405001)(47776003)(2950100001)(77096005)(66066001)(50466002)(4001450100002)(4001430100002)(101416001)(92566002)(189998001)(76176999)(105586002)(8676002)(107886002)(5001770100001)(7099028)(2004002)(21314002); DIR:OUT; SFP:1101; SCL:1; SRVR:BLUPR0501MB834; H:promb-2s-dhcp95-136.eng.vmware.com; FPR:; SPF:None; PTR:InfoNoRecords; A:1; MX:1; LANG:en; Received-SPF: None (EX13-EDG-OU-001.vmware.com: aditr@vmware.com does not designate permitted sender hosts) Received-SPF: None (protection.outlook.com: vmware.com does not designate permitted sender hosts) X-Microsoft-Exchange-Diagnostics: =?us-ascii?Q?1; BLUPR0501MB834; 23:h/VnqRbFA/ocQ418spyBJXV5mZ0IWIgS02p0YWaw?= =?us-ascii?Q?Lnqucm2GMM4rjpF4i/C+8YKzsZnrbFoWh9WpedLFwfYdP0M6hvD5DLcWkB6r?= =?us-ascii?Q?gB1eZgOgQb/J3eE2oJrjWf0rfxMIskLuDkR2sb8UYbglNqJi4rtgka2VeTaR?= =?us-ascii?Q?Do637CnYIu9S3ndYBfU2VPfXUnmZwFf/h1fZTZddO45YSqFwTDN2JMTbMv4P?= =?us-ascii?Q?wJUQCInbFvTfLZ10H3sqZMDhXFKvpG5u/s3/8lWR5mJd4Z4G+b8ff/ErZJXA?= =?us-ascii?Q?8ClF6GQICtnjnO3gSmSbh8Hh1R3BWdbaaSRfYDENCpLl7a2V7qH91aXouVZu?= =?us-ascii?Q?r25oyALYCEqxIW39HGExPgF2/v6UdAEcJDm4EFhmBoI2conff2tZdr1AjmFA?= =?us-ascii?Q?nR8qHJEPDhizNy7bZqTmU+5LTVh99r6DGxTBogkJCQNZw2Wf2TTnwS6WIrjg?= =?us-ascii?Q?b0psgrudVKuvON30QyjGV2skfz74t5gc6FwzCOeRChI5JcDoXXr8StFmr37P?= =?us-ascii?Q?IdB0swXbAg+ajoFsYHlQMfogRfn7BNwBfwgDEeHYicQX9og07cOhIQpPTzLC?= =?us-ascii?Q?cXP+iuJ8i8VkJB60tFPvq3JFgoMDNLdVTt6Tfq93Qo20uVhFshUXRjD+vEh4?= =?us-ascii?Q?c4eLV37VCzAiA7nk2kooaafFgYf84as1cSvTM3CfmDxIXZU6TaQXh15TBDQF?= =?us-ascii?Q?6zqicf4v6OVMrx45+HHzO+WZAKqvMqnC7S1ImV2eTOvTK783ez0ffg4mgoVu?= =?us-ascii?Q?GpkSZ9e5kfoEbSwLV/nHecc+VSnLTnNeUO7pllUrzrsLpS7m41aeyJigX5Um?= =?us-ascii?Q?V7qsH2ery9QF+imgr4uPqzkKGpvq1iwx5G2XAfdboo9orei85n423X+fmgd2?= =?us-ascii?Q?JIEsRSAAEvuwqKXjYusi5W77y6vzLM1h+dHuuONxypHrlcq6/EwB+8EGfzEs?= =?us-ascii?Q?TGUQgA9kyus5FREuCcs8On3V8onNTu02URVdO5dno6YmiZaOw/x1c2fHmPKe?= =?us-ascii?Q?yrORjhXJsKNydMuCq5faMp6oDMDtAfMjKLVfOtgQQQ5SaU/rQUO6GBC1WsxA?= =?us-ascii?Q?SLoNcPbcVdT1dyoYhfMFmZwvIm7Gt9HSLC94weenkt44An2BlJ55ZdSdZBhG?= =?us-ascii?Q?dXjxGA7TtlOayVGeqYyA8SntpbakVtijIN5BXKMAoeOQTlLG9Vu20vwohX3X?= =?us-ascii?Q?7xsy4SufuVvElT55RgKj0Tpv+1RRoiUknWk8zpYDlsNB02y3ucTSNDmSuWGo?= =?us-ascii?Q?Fji1xdauHyURCEnAVm4MHX0HrEDkk/YwJ8jFC1GTVeEg8TrIdCA4OjJh4XAQ?= =?us-ascii?Q?Ew=3D=3D?= X-Microsoft-Exchange-Diagnostics: 1; BLUPR0501MB834; 6:4zO85oTXaoh6qyizysHQvkrW+cEZy61jkz4VZnI985g7DuVO2DGJldxg9N52zipEB3TBsFTLEM+z1mms8iLRFO0lV/B9eS/PyC9fXKOq7YDo+Y17iRwqryk/g7Ju+gJQ2em6NUK4ngsR5BIkWd8XIdGRbM3AILiiIQJJk8Pxznj44pM9zH92tmbNdlWAEMp0nnXFWVV50J1Tag9m6OO+bxHa71bCfntDPIWOgcPwM12Hy0yWJpPoxVw0ifYsHQW6KdhEnXsfHxEaVCaBxg9HFA/8RdueSW/feBTi6V1b4AU=; 5:REKfnTauLihThChy8RHEphhITANJd3FGI+WIrt5k2VQTRn05ZrBK2kh5NvtJp55Uy1WTxwC0ScJ7T8Kc0A2wO+e648NdmxQO4U+803uS2W51ddIBZKG4N1iIxHQROVcGpmnbWH9gYefoPeX27N2wlg==; 24:39ALmYJeWmDXW9bJee+Ste/THH9EcyjzzPuCrs2KWU7pmGTQ3IXD4chYtNsS5LyNhOmgwIzh6XpFTxgS46jrQcFrTVIkD9qprSl+lBJeMpY=; 7:9YPrp2lzOX3RuC1kr1ah6JQ5fDU975K9c7USQY3PeLEfneDOaVRRjgSn+Ti/s4i9BrXFao5bc7/GwKxUx0zqX5BYbBMMDz2ZFHenqo1bT0SfLaQreT0uvpTYLn0qS43aVVt38GxXMN+NI0UZ00EvZwW11q9mU5aG4JjdB0wADwdHNfHpL1lcQLM8kY6l2jNIDA5K1wZ3V8ioAzoYkHgfJSNABSOvdzCfD+RSi6IhUOzn8RuvtpI50ibDgftTSxxJ SpamDiagnosticOutput: 1:99 SpamDiagnosticMetadata: NSPM X-Microsoft-Exchange-Diagnostics: 1; BLUPR0501MB834; 20:6zkRLv3ohC+elqkz7CN8w+6pRyoH5bHNf9axypChVIvaC1Fb0s1MGJWLoZdcVqjcynYKzgmarFZgsJGDYuhVu2Gji4yJRVx9AVhecchH1l7kSqXuLNNTyvHl6KXsbo6xa2PycV1xwUOMY4k0siiwbfb0Nsorchgcswp3OGldmS8= X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Jul 2016 19:37:30.9529 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-Transport-CrossTenantHeadersStamped: BLUPR0501MB834 Sender: linux-rdma-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-rdma@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch describes the main specification of the underlying virtual RDMA device. The pvrdma_dev_api header file defines the Verbs commands and their parameters that can be issued to the device backend. Reviewed-by: Jorgen Hansen Reviewed-by: George Zhang Reviewed-by: Aditya Sarwade Reviewed-by: Bryan Tan Signed-off-by: Adit Ranadive --- drivers/infiniband/hw/pvrdma/pvrdma_defs.h | 300 ++++++++++++++++++++++ drivers/infiniband/hw/pvrdma/pvrdma_dev_api.h | 342 ++++++++++++++++++++++++++ 2 files changed, 642 insertions(+) create mode 100644 drivers/infiniband/hw/pvrdma/pvrdma_defs.h create mode 100644 drivers/infiniband/hw/pvrdma/pvrdma_dev_api.h diff --git a/drivers/infiniband/hw/pvrdma/pvrdma_defs.h b/drivers/infiniband/hw/pvrdma/pvrdma_defs.h new file mode 100644 index 0000000..225cba4 --- /dev/null +++ b/drivers/infiniband/hw/pvrdma/pvrdma_defs.h @@ -0,0 +1,300 @@ +/* + * Copyright (c) 2012-2016 VMware, Inc. All rights reserved. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of EITHER the GNU General Public License + * version 2 as published by the Free Software Foundation or the BSD + * 2-Clause License. This program is distributed in the hope that it + * will be useful, but WITHOUT ANY WARRANTY; WITHOUT EVEN THE IMPLIED + * WARRANTY OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. + * See the GNU General Public License version 2 for more details at + * http://www.gnu.org/licenses/old-licenses/gpl-2.0.en.html. + * + * You should have received a copy of the GNU General Public License + * along with this program available in the file COPYING in the main + * directory of this source tree. + * + * The BSD 2-Clause License + * + * Redistribution and use in source and binary forms, with or + * without modification, are permitted provided that the following + * conditions are met: + * + * - Redistributions of source code must retain the above + * copyright notice, this list of conditions and the following + * disclaimer. + * + * - Redistributions in binary form must reproduce the above + * copyright notice, this list of conditions and the following + * disclaimer in the documentation and/or other materials + * provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef __PVRDMA_DEFS_H__ +#define __PVRDMA_DEFS_H__ + +#include +#include "pvrdma_ib_verbs.h" +#include "pvrdma_uapi.h" + +/* + * Masks and accessors for page directory, which is a two-level lookup: + * page directory -> page table -> page. Only one directory for now, but we + * could expand that easily. 9 bits for tables, 9 bits for pages, gives one + * gigabyte for memory regions and so forth. + */ + +#define PVRDMA_PAGE_DIR_DIR(x) (((x) >> 18) & 0x1) +#define PVRDMA_PAGE_DIR_TABLE(x) (((x) >> 9) & 0x1ff) +#define PVRDMA_PAGE_DIR_PAGE(x) ((x) & 0x1ff) +#define PVRDMA_PAGE_DIR_MAX_PAGES (1 * 512 * 512) +#define PVRDMA_MAX_FAST_REG_PAGES 128 + +/* + * Max MSI-X vectors. + */ + +#define PVRDMA_MAX_INTERRUPTS 3 + +/* Register offsets within PCI resource on BAR1. */ +#define PVRDMA_REG_VERSION 0x00 /* R: Version of device. */ +#define PVRDMA_REG_DSRLOW 0x04 /* W: Device shared region low PA. */ +#define PVRDMA_REG_DSRHIGH 0x08 /* W: Device shared region high PA. */ +#define PVRDMA_REG_CTL 0x0c /* W: PVRDMA_DEVICE_CTL */ +#define PVRDMA_REG_REQUEST 0x10 /* W: Indicate device request. */ +#define PVRDMA_REG_ERR 0x14 /* R: Device error. */ +#define PVRDMA_REG_ICR 0x18 /* R: Interrupt cause. */ +#define PVRDMA_REG_IMR 0x1c /* R/W: Interrupt mask. */ +#define PVRDMA_REG_MACL 0x20 /* R/W: MAC address low. */ +#define PVRDMA_REG_MACH 0x24 /* R/W: MAC address high. */ + +/* Object flags. */ +#define PVRDMA_CQ_FLAG_ARMED_SOL BIT(0) /* Armed for solicited-only. */ +#define PVRDMA_CQ_FLAG_ARMED BIT(1) /* Armed. */ +#define PVRDMA_MR_FLAG_DMA BIT(0) /* DMA region. */ +#define PVRDMA_MR_FLAG_FRMR BIT(1) /* Fast reg memory region. */ + +/* + * Atomic operation capability (masked versions are extended atomic + * operations. + */ + +#define PVRDMA_ATOMIC_OP_COMP_SWAP BIT(0) /* Compare and swap. */ +#define PVRDMA_ATOMIC_OP_FETCH_ADD BIT(1) /* Fetch and add. */ +#define PVRDMA_ATOMIC_OP_MASK_COMP_SWAP BIT(2) /* Masked compare and swap. */ +#define PVRDMA_ATOMIC_OP_MASK_FETCH_ADD BIT(3) /* Masked fetch and add. */ + +/* + * Base Memory Management Extension flags to support Fast Reg Memory Regions + * and Fast Reg Work Requests. Each flag represents a verb operation and we + * must support all of them to qualify for the BMME device cap. + */ + +#define PVRDMA_BMME_FLAG_LOCAL_INV BIT(0) /* Local Invalidate. */ +#define PVRDMA_BMME_FLAG_REMOTE_INV BIT(1) /* Remote Invalidate. */ +#define PVRDMA_BMME_FLAG_FAST_REG_WR BIT(2) /* Fast Reg Work Request. */ + +/* + * GID types. The interpretation of the gid_types bit field in the device + * capabilities will depend on the device mode. For now, the device only + * supports RoCE as mode, so only the different GID types for RoCE are + * defined. + */ + +#define PVRDMA_GID_TYPE_FLAG_ROCE_V1 BIT(0) +#define PVRDMA_GID_TYPE_FLAG_ROCE_V2 BIT(1) + +enum pvrdma_pci_resource { + PVRDMA_PCI_RESOURCE_MSIX = 0, /* BAR0: MSI-X, MMIO. */ + PVRDMA_PCI_RESOURCE_REG, /* BAR1: Registers, MMIO. */ + PVRDMA_PCI_RESOURCE_UAR, /* BAR2: UAR pages, MMIO, 64-bit. */ + PVRDMA_PCI_RESOURCE_LAST, /* Last. */ +}; + +enum pvrdma_device_ctl { + PVRDMA_DEVICE_CTL_ACTIVATE = 0, /* Activate device. */ + PVRDMA_DEVICE_CTL_QUIESCE, /* Quiesce device. */ + PVRDMA_DEVICE_CTL_RESET, /* Reset device. */ +}; + +enum pvrdma_intr_vector { + PVRDMA_INTR_VECTOR_RESPONSE = 0, /* Command response. */ + PVRDMA_INTR_VECTOR_ASYNC = 1, /* Async events. */ + PVRDMA_INTR_VECTOR_CQ = 2, /* CQ notification. */ + /* Additional CQ notification vectors. */ +}; + +enum pvrdma_intr_cause { + PVRDMA_INTR_CAUSE_RESPONSE = (1 << PVRDMA_INTR_VECTOR_RESPONSE), + PVRDMA_INTR_CAUSE_ASYNC = (1 << PVRDMA_INTR_VECTOR_ASYNC), + PVRDMA_INTR_CAUSE_CQ = (1 << PVRDMA_INTR_VECTOR_CQ), +}; + +enum pvrdma_intr_type { + PVRDMA_INTR_TYPE_INTX = 0, /* Legacy. */ + PVRDMA_INTR_TYPE_MSI, /* MSI. */ + PVRDMA_INTR_TYPE_MSIX, /* MSI-X. */ +}; + +enum pvrdma_gos_bits { + PVRDMA_GOS_BITS_UNK = 0, /* Unknown. */ + PVRDMA_GOS_BITS_32, /* 32-bit. */ + PVRDMA_GOS_BITS_64, /* 64-bit. */ +}; + +enum pvrdma_gos_type { + PVRDMA_GOS_TYPE_UNK = 0, /* Unknown. */ + PVRDMA_GOS_TYPE_LINUX, /* Linux. */ +}; + +enum pvrdma_device_mode { + PVRDMA_DEVICE_MODE_ROCE = 0, /* RoCE. */ + PVRDMA_DEVICE_MODE_IWARP, /* iWarp. */ + PVRDMA_DEVICE_MODE_IB /* InfiniBand. */ +}; + +struct pvrdma_gos_info { + __u32 gos_bits:2; /* W: PVRDMA_GOS_BITS_ */ + __u32 gos_type:4; /* W: PVRDMA_GOS_TYPE_ */ + __u32 gos_ver:16; /* W: Guest OS version. */ + __u32 gos_misc:10; /* W: Other. */ + __u32 pad; /* Pad to 8-byte alignment. */ +}; + +struct pvrdma_device_caps { + __u64 fw_ver; /* R: Query device. */ + __be64 node_guid; + __be64 sys_image_guid; + __u64 max_mr_size; + __u64 page_size_cap; + __u64 atomic_arg_sizes; /* EXP verbs. */ + __u32 exp_comp_mask; /* EXP verbs. */ + __u32 device_cap_flags2; /* EXP verbs. */ + __u32 max_fa_bit_boundary; /* EXP verbs. */ + __u32 log_max_atomic_inline_arg; /* EXP verbs. */ + __u32 vendor_id; + __u32 vendor_part_id; + __u32 hw_ver; + __u32 max_qp; + __u32 max_qp_wr; + __u32 device_cap_flags; + __u32 max_sge; + __u32 max_sge_rd; + __u32 max_cq; + __u32 max_cqe; + __u32 max_mr; + __u32 max_pd; + __u32 max_qp_rd_atom; + __u32 max_ee_rd_atom; + __u32 max_res_rd_atom; + __u32 max_qp_init_rd_atom; + __u32 max_ee_init_rd_atom; + __u32 max_ee; + __u32 max_rdd; + __u32 max_mw; + __u32 max_raw_ipv6_qp; + __u32 max_raw_ethy_qp; + __u32 max_mcast_grp; + __u32 max_mcast_qp_attach; + __u32 max_total_mcast_qp_attach; + __u32 max_ah; + __u32 max_fmr; + __u32 max_map_per_fmr; + __u32 max_srq; + __u32 max_srq_wr; + __u32 max_srq_sge; + __u32 max_uar; + __u32 gid_tbl_len; + __u16 max_pkeys; + __u8 local_ca_ack_delay; + __u8 phys_port_cnt; + __u8 mode; /* PVRDMA_DEVICE_MODE_ */ + __u8 atomic_ops; /* PVRDMA_ATOMIC_OP_* bits */ + __u8 bmme_flags; /* Memory Mgmt Extensions for FRMR/FRWR */ + __u8 gid_types; /* PVRDMA_GID_TYPE_FLAG_ */ + __u8 reserved[4]; +}; + +struct pvrdma_ring_page_info { + __u32 num_pages; /* Num pages incl. header. */ + __u32 reserved; /* Reserved. */ + __u64 pdir_dma; /* Page directory PA. */ +}; + +#pragma pack(push, 1) + +struct pvrdma_device_shared_region { + __u32 driver_version; /* W: Driver version. */ + __u32 pad; /* Pad to 8-byte align. */ + struct pvrdma_gos_info gos_info; /* W: Guest OS information. */ + __u64 cmd_slot_dma; /* W: Command slot address. */ + __u64 resp_slot_dma; /* W: Response slot address. */ + struct pvrdma_ring_page_info async_ring_pages; + /* W: Async ring page info. */ + struct pvrdma_ring_page_info cq_ring_pages; + /* W: CQ ring page info. */ + __u32 uar_pfn; /* W: UAR pageframe. */ + __u32 pad2; /* Pad to 8-byte align. */ + struct pvrdma_device_caps caps; /* R: Device capabilities. */ +}; + +#pragma pack(pop) + + +/* Event types. Currently a 1:1 mapping with enum ib_event. */ +enum pvrdma_eqe_type { + PVRDMA_EVENT_CQ_ERR = 0, + PVRDMA_EVENT_QP_FATAL, + PVRDMA_EVENT_QP_REQ_ERR, + PVRDMA_EVENT_QP_ACCESS_ERR, + PVRDMA_EVENT_COMM_EST, + PVRDMA_EVENT_SQ_DRAINED, + PVRDMA_EVENT_PATH_MIG, + PVRDMA_EVENT_PATH_MIG_ERR, + PVRDMA_EVENT_DEVICE_FATAL, + PVRDMA_EVENT_PORT_ACTIVE, + PVRDMA_EVENT_PORT_ERR, + PVRDMA_EVENT_LID_CHANGE, + PVRDMA_EVENT_PKEY_CHANGE, + PVRDMA_EVENT_SM_CHANGE, + PVRDMA_EVENT_SRQ_ERR, + PVRDMA_EVENT_SRQ_LIMIT_REACHED, + PVRDMA_EVENT_QP_LAST_WQE_REACHED, + PVRDMA_EVENT_CLIENT_REREGISTER, + PVRDMA_EVENT_GID_CHANGE, +}; + +/* Event queue element. */ +struct pvrdma_eqe { + __u32 type; /* Event type. */ + __u32 info; /* Handle, other. */ +}; + +/* CQ notification queue element. */ +struct pvrdma_cqne { + __u32 info; /* Handle */ +}; + +static inline void pvrdma_init_cqe(struct pvrdma_cqe *cqe, __u64 wr_id, + __u64 qp) +{ + memset(cqe, 0, sizeof(*cqe)); + cqe->status = PVRDMA_WC_GENERAL_ERR; + cqe->wr_id = wr_id; + cqe->qp = qp; +} + +#endif /* __PVRDMA_DEFS_H__ */ diff --git a/drivers/infiniband/hw/pvrdma/pvrdma_dev_api.h b/drivers/infiniband/hw/pvrdma/pvrdma_dev_api.h new file mode 100644 index 0000000..4b4d8e5 --- /dev/null +++ b/drivers/infiniband/hw/pvrdma/pvrdma_dev_api.h @@ -0,0 +1,342 @@ +/* + * Copyright (c) 2012-2016 VMware, Inc. All rights reserved. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of EITHER the GNU General Public License + * version 2 as published by the Free Software Foundation or the BSD + * 2-Clause License. This program is distributed in the hope that it + * will be useful, but WITHOUT ANY WARRANTY; WITHOUT EVEN THE IMPLIED + * WARRANTY OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. + * See the GNU General Public License version 2 for more details at + * http://www.gnu.org/licenses/old-licenses/gpl-2.0.en.html. + * + * You should have received a copy of the GNU General Public License + * along with this program available in the file COPYING in the main + * directory of this source tree. + * + * The BSD 2-Clause License + * + * Redistribution and use in source and binary forms, with or + * without modification, are permitted provided that the following + * conditions are met: + * + * - Redistributions of source code must retain the above + * copyright notice, this list of conditions and the following + * disclaimer. + * + * - Redistributions in binary form must reproduce the above + * copyright notice, this list of conditions and the following + * disclaimer in the documentation and/or other materials + * provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, + * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED + * OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef __PVRDMA_DEV_API_H__ +#define __PVRDMA_DEV_API_H__ + +#include +#include "pvrdma_ib_verbs.h" + +enum { + PVRDMA_CMD_FIRST = 0, + PVRDMA_CMD_QUERY_PORT = PVRDMA_CMD_FIRST, + PVRDMA_CMD_QUERY_PKEY, + PVRDMA_CMD_CREATE_PD, + PVRDMA_CMD_DESTROY_PD, + PVRDMA_CMD_CREATE_MR, + PVRDMA_CMD_DESTROY_MR, + PVRDMA_CMD_CREATE_CQ, + PVRDMA_CMD_RESIZE_CQ, + PVRDMA_CMD_DESTROY_CQ, + PVRDMA_CMD_CREATE_QP, + PVRDMA_CMD_MODIFY_QP, + PVRDMA_CMD_QUERY_QP, + PVRDMA_CMD_DESTROY_QP, + PVRDMA_CMD_CREATE_UC, + PVRDMA_CMD_DESTROY_UC, + PVRDMA_CMD_CREATE_BIND, + PVRDMA_CMD_DESTROY_BIND, + PVRDMA_CMD_MAX, +}; + +enum { + PVRDMA_CMD_FIRST_RESP = (1 << 31), + PVRDMA_CMD_QUERY_PORT_RESP = PVRDMA_CMD_FIRST_RESP, + PVRDMA_CMD_QUERY_PKEY_RESP, + PVRDMA_CMD_CREATE_PD_RESP, + PVRDMA_CMD_DESTROY_PD_RESP_NOOP, + PVRDMA_CMD_CREATE_MR_RESP, + PVRDMA_CMD_DESTROY_MR_RESP_NOOP, + PVRDMA_CMD_CREATE_CQ_RESP, + PVRDMA_CMD_RESIZE_CQ_RESP, + PVRDMA_CMD_DESTROY_CQ_RESP_NOOP, + PVRDMA_CMD_CREATE_QP_RESP, + PVRDMA_CMD_MODIFY_QP_RESP, + PVRDMA_CMD_QUERY_QP_RESP, + PVRDMA_CMD_DESTROY_QP_RESP, + PVRDMA_CMD_CREATE_UC_RESP, + PVRDMA_CMD_DESTROY_UC_RESP_NOOP, + PVRDMA_CMD_CREATE_BIND_RESP_NOOP, + PVRDMA_CMD_DESTROY_BIND_RESP_NOOP, + PVRDMA_CMD_MAX_RESP, +}; + +struct pvrdma_cmd_hdr { + __u64 response; /* Key for response lookup. */ + __u32 cmd; /* PVRDMA_CMD_ */ + __u32 reserved; /* Reserved. */ +}; + +struct pvrdma_cmd_resp_hdr { + __u64 response; /* From cmd hdr. */ + __u32 ack; /* PVRDMA_CMD_XXX_RESP */ + __u8 err; /* Error. */ + __u8 reserved[3]; /* Reserved. */ +}; + +struct pvrdma_cmd_query_port { + struct pvrdma_cmd_hdr hdr; + __u8 port_num; + __u8 reserved[7]; +}; + +struct pvrdma_cmd_query_port_resp { + struct pvrdma_cmd_resp_hdr hdr; + struct pvrdma_port_attr attrs; +}; + +struct pvrdma_cmd_query_pkey { + struct pvrdma_cmd_hdr hdr; + __u8 port_num; + __u8 index; + __u8 reserved[6]; +}; + +struct pvrdma_cmd_query_pkey_resp { + struct pvrdma_cmd_resp_hdr hdr; + __u16 pkey; + __u8 reserved[6]; +}; + +struct pvrdma_cmd_create_uc { + struct pvrdma_cmd_hdr hdr; + __u32 pfn; /* UAR page frame number */ + __u8 reserved[4]; +}; + +struct pvrdma_cmd_create_uc_resp { + struct pvrdma_cmd_resp_hdr hdr; + __u32 ctx_handle; + __u8 reserved[4]; +}; + +struct pvrdma_cmd_destroy_uc { + struct pvrdma_cmd_hdr hdr; + __u32 ctx_handle; + __u8 reserved[4]; +}; + +struct pvrdma_cmd_create_pd { + struct pvrdma_cmd_hdr hdr; + __u32 ctx_handle; + __u8 reserved[4]; +}; + +struct pvrdma_cmd_create_pd_resp { + struct pvrdma_cmd_resp_hdr hdr; + __u32 pd_handle; + __u8 reserved[4]; +}; + +struct pvrdma_cmd_destroy_pd { + struct pvrdma_cmd_hdr hdr; + __u32 pd_handle; + __u8 reserved[4]; +}; + +struct pvrdma_cmd_create_mr { + struct pvrdma_cmd_hdr hdr; + __u64 start; + __u64 length; + __u64 pdir_dma; + __u32 pd_handle; + __u32 access_flags; + __u32 flags; + __u32 nchunks; +}; + +struct pvrdma_cmd_create_mr_resp { + struct pvrdma_cmd_resp_hdr hdr; + __u32 mr_handle; + __u32 lkey; + __u32 rkey; + __u8 reserved[4]; +}; + +struct pvrdma_cmd_destroy_mr { + struct pvrdma_cmd_hdr hdr; + __u32 mr_handle; + __u8 reserved[4]; +}; + +struct pvrdma_cmd_create_cq { + struct pvrdma_cmd_hdr hdr; + __u64 pdir_dma; + __u32 ctx_handle; + __u32 cqe; + __u32 nchunks; + __u8 reserved[4]; +}; + +struct pvrdma_cmd_create_cq_resp { + struct pvrdma_cmd_resp_hdr hdr; + __u32 cq_handle; + __u32 cqe; +}; + +struct pvrdma_cmd_resize_cq { + struct pvrdma_cmd_hdr hdr; + __u32 cq_handle; + __u32 cqe; +}; + +struct pvrdma_cmd_resize_cq_resp { + struct pvrdma_cmd_resp_hdr hdr; + __u32 cqe; + __u8 reserved[4]; +}; + +struct pvrdma_cmd_destroy_cq { + struct pvrdma_cmd_hdr hdr; + __u32 cq_handle; + __u8 reserved[4]; +}; + +struct pvrdma_cmd_create_qp { + struct pvrdma_cmd_hdr hdr; + __u64 pdir_dma; + __u32 pd_handle; + __u32 send_cq_handle; + __u32 recv_cq_handle; + __u32 srq_handle; + __u32 max_send_wr; + __u32 max_recv_wr; + __u32 max_send_sge; + __u32 max_recv_sge; + __u32 max_inline_data; + __u32 lkey; + __u32 access_flags; + __u16 total_chunks; + __u16 send_chunks; + __u16 max_atomic_arg; + __u8 sq_sig_all; + __u8 qp_type; + __u8 is_srq; + __u8 reserved[3]; +}; + +struct pvrdma_cmd_create_qp_resp { + struct pvrdma_cmd_resp_hdr hdr; + __u32 qpn; + __u32 max_send_wr; + __u32 max_recv_wr; + __u32 max_send_sge; + __u32 max_recv_sge; + __u32 max_inline_data; +}; + +struct pvrdma_cmd_modify_qp { + struct pvrdma_cmd_hdr hdr; + __u32 qp_handle; + __u32 attr_mask; + struct pvrdma_qp_attr attrs; +}; + +struct pvrdma_cmd_query_qp { + struct pvrdma_cmd_hdr hdr; + __u32 qp_handle; + __u32 attr_mask; +}; + +struct pvrdma_cmd_query_qp_resp { + struct pvrdma_cmd_resp_hdr hdr; + struct pvrdma_qp_attr attrs; +}; + +struct pvrdma_cmd_destroy_qp { + struct pvrdma_cmd_hdr hdr; + __u32 qp_handle; + __u8 reserved[4]; +}; + +struct pvrdma_cmd_destroy_qp_resp { + struct pvrdma_cmd_resp_hdr hdr; + __u32 events_reported; + __u8 reserved[4]; +}; + +struct pvrdma_cmd_create_bind { + struct pvrdma_cmd_hdr hdr; + __u32 mtu; + __u32 vlan; + __u32 index; + __u8 new_gid[16]; + __u8 gid_type; + __u8 reserved[3]; +}; + +struct pvrdma_cmd_destroy_bind { + struct pvrdma_cmd_hdr hdr; + __u32 index; + __u8 dest_gid[16]; + __u8 reserved[4]; +}; + +union pvrdma_cmd_req { + struct pvrdma_cmd_hdr hdr; + struct pvrdma_cmd_query_port query_port; + struct pvrdma_cmd_query_pkey query_pkey; + struct pvrdma_cmd_create_uc create_uc; + struct pvrdma_cmd_destroy_uc destroy_uc; + struct pvrdma_cmd_create_pd create_pd; + struct pvrdma_cmd_destroy_pd destroy_pd; + struct pvrdma_cmd_create_mr create_mr; + struct pvrdma_cmd_destroy_mr destroy_mr; + struct pvrdma_cmd_create_cq create_cq; + struct pvrdma_cmd_resize_cq resize_cq; + struct pvrdma_cmd_destroy_cq destroy_cq; + struct pvrdma_cmd_create_qp create_qp; + struct pvrdma_cmd_modify_qp modify_qp; + struct pvrdma_cmd_query_qp query_qp; + struct pvrdma_cmd_destroy_qp destroy_qp; + struct pvrdma_cmd_create_bind create_bind; + struct pvrdma_cmd_destroy_bind destroy_bind; +}; + +union pvrdma_cmd_resp { + struct pvrdma_cmd_resp_hdr hdr; + struct pvrdma_cmd_query_port_resp query_port_resp; + struct pvrdma_cmd_query_pkey_resp query_pkey_resp; + struct pvrdma_cmd_create_uc_resp create_uc_resp; + struct pvrdma_cmd_create_pd_resp create_pd_resp; + struct pvrdma_cmd_create_mr_resp create_mr_resp; + struct pvrdma_cmd_create_cq_resp create_cq_resp; + struct pvrdma_cmd_resize_cq_resp resize_cq_resp; + struct pvrdma_cmd_create_qp_resp create_qp_resp; + struct pvrdma_cmd_query_qp_resp query_qp_resp; + struct pvrdma_cmd_destroy_qp_resp destroy_qp_resp; +}; + +#endif /* __PVRDMA_DEV_API_H__ */