[for-next,1/4] RDMA/hns: Fix the endian problem for hns

Message ID	1517314845-126094-2-git-send-email-oulijun@huawei.com (mailing list archive)
State	Changes Requested
Headers	show Return-Path: <linux-rdma-owner@kernel.org> From: Lijun Ou <oulijun@huawei.com> To: <dledford@redhat.com>, <jgg@mellanox.com> CC: <leon@kernel.org>, <linux-rdma@vger.kernel.org> Subject: [PATCH for-next 1/4] RDMA/hns: Fix the endian problem for hns Date: Tue, 30 Jan 2018 20:20:42 +0800 Message-ID: <1517314845-126094-2-git-send-email-oulijun@huawei.com> In-Reply-To: <1517314845-126094-1-git-send-email-oulijun@huawei.com> References: <1517314845-126094-1-git-send-email-oulijun@huawei.com> MIME-Version: 1.0 Content-Type: text/plain Sender: linux-rdma-owner@vger.kernel.org Precedence: bulk

Hi Lijun, I love your patch! Perhaps something to improve: [auto build test WARNING on linus/master] [also build test WARNING on next-20180201] [cannot apply to v4.15] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system] url: https://github.com/0day-ci/linux/commits/Lijun-Ou/Fixes-for-hns/20180202-014309 reproduce: # apt-get install sparse make ARCH=x86_64 allmodconfig make C=1 CF=-D__CHECK_ENDIAN__ sparse warnings: (new ones prefixed by >>) >> drivers/infiniband/hw/hns/hns_roce_qp.c:699:37: sparse: incorrect type in assignment (different base types) @@ expected unsigned int doorbell_qpn @@ got ed int doorbell_qpn @@ drivers/infiniband/hw/hns/hns_roce_qp.c:699:37: expected unsigned int doorbell_qpn drivers/infiniband/hw/hns/hns_roce_qp.c:699:37: got restricted __le64 <noident> -- drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1227:9: sparse: invalid assignment: |= drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1227:9: left side has type unsigned int drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1227:9: right side has type restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1259:17: sparse: invalid assignment: &= drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1259:17: left side has type unsigned int drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1259:17: right side has type restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1259:17: sparse: invalid assignment: |= drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1259:17: left side has type unsigned int drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1259:17: right side has type restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1266:17: sparse: invalid assignment: &= drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1266:17: left side has type unsigned int drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1266:17: right side has type restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1266:17: sparse: invalid assignment: |= drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1266:17: left side has type unsigned int drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1266:17: right side has type restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1497:29: sparse: cast to restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1498:34: sparse: cast to restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1500:34: sparse: cast to restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1502:39: sparse: cast to restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1556:36: sparse: cast to restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1571:9: sparse: invalid assignment: &= drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1571:9: left side has type unsigned int drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1571:9: right side has type restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1571:9: sparse: invalid assignment: |= drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1571:9: left side has type unsigned int drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1571:9: right side has type restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1573:9: sparse: invalid assignment: &= drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1573:9: left side has type unsigned int drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1573:9: right side has type restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1573:9: sparse: invalid assignment: |= drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1573:9: left side has type unsigned int drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1573:9: right side has type restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1579:9: sparse: invalid assignment: &= drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1579:9: left side has type unsigned int drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1579:9: right side has type restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1579:9: sparse: invalid assignment: |= drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1579:9: left side has type unsigned int drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1579:9: right side has type restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1581:9: sparse: invalid assignment: &= drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1581:9: left side has type unsigned int drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1581:9: right side has type restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1581:9: sparse: invalid assignment: |= drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1581:9: left side has type unsigned int drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1581:9: right side has type restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1678:9: sparse: invalid assignment: &= drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1678:9: left side has type unsigned int drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1678:9: right side has type restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1678:9: sparse: invalid assignment: |= drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1678:9: left side has type unsigned int drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1678:9: right side has type restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1680:9: sparse: invalid assignment: &= drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1680:9: left side has type unsigned int drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1680:9: right side has type restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1680:9: sparse: invalid assignment: |= drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1680:9: left side has type unsigned int drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1680:9: right side has type restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1682:9: sparse: invalid assignment: &= drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1682:9: left side has type unsigned int drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1682:9: right side has type restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1682:9: sparse: invalid assignment: |= drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1682:9: left side has type unsigned int drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1682:9: right side has type restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1683:9: sparse: invalid assignment: &= drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1683:9: left side has type unsigned int drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1683:9: right side has type restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1683:9: sparse: invalid assignment: |= drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1683:9: left side has type unsigned int drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1683:9: right side has type restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1684:9: sparse: invalid assignment: &= drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1684:9: left side has type unsigned int drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1684:9: right side has type restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1684:9: sparse: invalid assignment: |= drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1684:9: left side has type unsigned int drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1684:9: right side has type restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1687:22: sparse: incorrect type in argument 1 (different base types) @@ expected unsigned long val @@ got restunsigned long val @@ drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1687:22: expected unsigned long val drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1687:22: got restricted __le64 <noident> drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1688:22: sparse: incorrect type in argument 1 (different base types) @@ expected unsigned long val @@ got restunsigned long val @@ drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1688:22: expected unsigned long val drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1688:22: got restricted __le64 <noident> drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1689:22: sparse: incorrect type in argument 1 (different base types) @@ expected unsigned int val @@ got restrunsigned int val @@ drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1689:22: expected unsigned int val drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1689:22: got restricted __le32 <noident> drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1693:22: sparse: incorrect type in argument 1 (different base types) @@ expected unsigned int val @@ got restrunsigned int val @@ drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1693:22: expected unsigned int val drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1693:22: got restricted __le32 <noident> drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1716:18: sparse: cast to restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1716:18: sparse: cast from restricted __be32 drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1785:9: sparse: invalid assignment: &= drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1785:9: left side has type unsigned int drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1785:9: right side has type restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1785:9: sparse: invalid assignment: |= drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1785:9: left side has type unsigned int drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1785:9: right side has type restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1800:9: sparse: invalid assignment: &= drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1800:9: left side has type unsigned int drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1800:9: right side has type restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1800:9: sparse: invalid assignment: |= drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1800:9: left side has type unsigned int drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1800:9: right side has type restricted __le32 >> drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1847:32: sparse: incorrect type in assignment (different base types) @@ expected restricted __le32 virt_addr_l @@ got unsignrestricted __le32 virt_addr_l @@ drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1847:32: expected restricted __le32 virt_addr_l drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1847:32: got unsigned int <noident> >> drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1848:32: sparse: incorrect type in assignment (different base types) @@ expected restricted __le32 virt_addr_h @@ got unsignrestricted __le32 virt_addr_h @@ drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1848:32: expected restricted __le32 virt_addr_h drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1848:32: got unsigned int <noident> >> drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1849:27: sparse: incorrect type in assignment (different base types) @@ expected restricted __le32 length @@ got unsignrestricted __le32 length @@ drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1849:27: expected restricted __le32 length drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1849:27: got unsigned int <noident> drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1881:25: sparse: cast from restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1887:25: sparse: cast from restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1891:25: sparse: cast from restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1897:25: sparse: cast from restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1901:25: sparse: cast from restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1907:25: sparse: cast from restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1911:25: sparse: cast from restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1918:25: sparse: cast from restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1924:25: sparse: cast from restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1928:25: sparse: cast from restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1934:25: sparse: cast from restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1938:25: sparse: cast from restricted __le32 >> drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1950:31: sparse: incorrect type in assignment (different base types) @@ expected restricted __le32 pbl_addr_l @@ got unsignrestricted __le32 pbl_addr_l @@ drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1950:31: expected restricted __le32 pbl_addr_l drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1950:31: got unsigned int <noident> >> drivers/infiniband/hw/hns/hns_roce_hw_v1.c:1985:9: sparse: too many warnings -- >> drivers/infiniband/hw/hns/hns_roce_main.c:203:31: sparse: incorrect type in assignment (different base types) @@ expected restricted __be64 sys_image_guid @@ got restricted __be64 sys_image_guid @@ drivers/infiniband/hw/hns/hns_roce_main.c:203:31: expected restricted __be64 sys_image_guid drivers/infiniband/hw/hns/hns_roce_main.c:203:31: got restricted __be32 <noident> -- >> drivers/infiniband/hw/hns/hns_roce_hw_v2.c:479:37: sparse: incorrect type in argument 1 (different base types) @@ expected restricted __be32 @@ got restricted __be32 @@ drivers/infiniband/hw/hns/hns_roce_hw_v2.c:479:37: expected restricted __be32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:479:37: got restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:574:37: sparse: incorrect type in argument 1 (different base types) @@ expected restricted __be32 @@ got restricted __be32 @@ drivers/infiniband/hw/hns/hns_roce_hw_v2.c:574:37: expected restricted __be32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:574:37: got restricted __le32 >> drivers/infiniband/hw/hns/hns_roce_hw_v2.c:802:18: sparse: restricted __le16 degrades to integer >> drivers/infiniband/hw/hns/hns_roce_hw_v2.c:819:34: sparse: incorrect type in assignment (different base types) @@ expected unsigned short desc_ret @@ got short desc_ret @@ drivers/infiniband/hw/hns/hns_roce_hw_v2.c:819:34: expected unsigned short desc_ret drivers/infiniband/hw/hns/hns_roce_hw_v2.c:819:34: got restricted __le16 retval drivers/infiniband/hw/hns/hns_roce_hw_v2.c:858:26: sparse: cast to restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:858:26: sparse: cast from restricted __le16 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:859:29: sparse: cast to restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:859:29: sparse: cast from restricted __le16 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1219:9: sparse: invalid assignment: &= drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1219:9: left side has type unsigned int drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1219:9: right side has type restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1219:9: sparse: invalid assignment: |= drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1219:9: left side has type unsigned int drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1219:9: right side has type restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1221:9: sparse: invalid assignment: &= drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1221:9: left side has type unsigned int drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1221:9: right side has type restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1221:9: sparse: invalid assignment: |= drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1221:9: left side has type unsigned int drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1221:9: right side has type restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1223:9: sparse: invalid assignment: &= drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1223:9: left side has type unsigned int drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1223:9: right side has type restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1223:9: sparse: invalid assignment: |= drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1223:9: left side has type unsigned int drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1223:9: right side has type restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1225:9: sparse: invalid assignment: &= drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1225:9: left side has type unsigned int drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1225:9: right side has type restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1225:9: sparse: invalid assignment: |= drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1225:9: left side has type unsigned int drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1225:9: right side has type restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1228:22: sparse: incorrect type in argument 1 (different base types) @@ expected unsigned long val @@ got restunsigned long val @@ drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1228:22: expected unsigned long val drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1228:22: got restricted __le64 <noident> drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1229:22: sparse: incorrect type in argument 1 (different base types) @@ expected unsigned long val @@ got restunsigned long val @@ drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1229:22: expected unsigned long val drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1229:22: got restricted __le64 <noident> drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1234:22: sparse: incorrect type in argument 1 (different base types) @@ expected unsigned int val @@ got restrunsigned int val @@ drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1234:22: expected unsigned int val drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1234:22: got restricted __le32 <noident> drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1235:22: sparse: incorrect type in argument 1 (different base types) @@ expected unsigned int val @@ got restrunsigned int val @@ drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1235:22: expected unsigned int val drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1235:22: got restricted __le32 <noident> drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1305:9: sparse: invalid assignment: &= drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1305:9: left side has type unsigned int drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1305:9: right side has type restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1305:9: sparse: invalid assignment: |= drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1305:9: left side has type unsigned int drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1305:9: right side has type restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1326:9: sparse: invalid assignment: &= drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1326:9: left side has type unsigned int drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1326:9: right side has type restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1326:9: sparse: invalid assignment: |= drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1326:9: left side has type unsigned int drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1326:9: right side has type restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1357:39: sparse: cast from restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1371:39: sparse: cast from restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1375:36: sparse: cast from restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1392:38: sparse: cast from restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1418:36: sparse: cast from restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1429:38: sparse: cast from restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1476:33: sparse: cast from restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1600:38: sparse: cast from restricted __le32 >> drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1605:38: sparse: incorrect type in assignment (different base types) @@ expected restricted __le32 cqe_cur_blk_addr @@ got unsignrestricted __le32 cqe_cur_blk_addr @@ drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1605:38: expected restricted __le32 cqe_cur_blk_addr drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1605:38: got unsigned int <noident> drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1607:33: sparse: cast from restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1609:9: sparse: cast from restricted __le32 >> drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1618:38: sparse: incorrect type in assignment (different base types) @@ expected restricted __le32 cqe_nxt_blk_addr @@ got unsignrestricted __le32 cqe_nxt_blk_addr @@ drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1618:38: expected restricted __le32 cqe_nxt_blk_addr drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1618:38: got unsigned int <noident> drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1619:9: sparse: cast from restricted __le32 >> drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1632:28: sparse: incorrect type in assignment (different base types) @@ expected restricted __le32 cqe_ba @@ got unsignrestricted __le32 cqe_ba @@ drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1632:28: expected restricted __le32 cqe_ba drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1632:28: got unsigned int <noident> drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1663:9: sparse: invalid assignment: &= drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1663:9: left side has type unsigned int drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1663:9: right side has type restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1663:9: sparse: invalid assignment: |= drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1663:9: left side has type unsigned int drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1663:9: right side has type restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1665:9: sparse: invalid assignment: &= drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1665:9: left side has type unsigned int drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1665:9: right side has type restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1665:9: sparse: invalid assignment: |= drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1665:9: left side has type unsigned int drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1665:9: right side has type restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1667:9: sparse: invalid assignment: &= drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1667:9: left side has type unsigned int drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1667:9: right side has type restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1667:9: sparse: invalid assignment: |= drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1667:9: left side has type unsigned int drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1667:9: right side has type restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1670:9: sparse: invalid assignment: &= drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1670:9: left side has type unsigned int drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1670:9: right side has type restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1670:9: sparse: invalid assignment: |= drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1670:9: left side has type unsigned int drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1670:9: right side has type restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1672:9: sparse: invalid assignment: &= drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1672:9: left side has type unsigned int drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1672:9: right side has type restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1672:9: sparse: invalid assignment: |= drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1672:9: left side has type unsigned int drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1672:9: right side has type restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1675:28: sparse: incorrect type in argument 1 (different base types) @@ expected restricted __be32 @@ got 2 @@ drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1675:28: expected restricted __be32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:1675:28: got unsigned int >> drivers/infiniband/hw/hns/hns_roce_hw_v2.c:2269:36: sparse: incorrect type in assignment (different base types) @@ expected restricted __le32 qkey_xrcd @@ got unsigned intrestricted __le32 qkey_xrcd @@ drivers/infiniband/hw/hns/hns_roce_hw_v2.c:2269:36: expected restricted __le32 qkey_xrcd drivers/infiniband/hw/hns/hns_roce_hw_v2.c:2269:36: got unsigned int const qkey drivers/infiniband/hw/hns/hns_roce_hw_v2.c:2583:36: sparse: incorrect type in assignment (different base types) @@ expected restricted __le32 qkey_xrcd @@ got unsigned intrestricted __le32 qkey_xrcd @@ drivers/infiniband/hw/hns/hns_roce_hw_v2.c:2583:36: expected restricted __le32 qkey_xrcd drivers/infiniband/hw/hns/hns_roce_hw_v2.c:2583:36: got unsigned int const qkey >> drivers/infiniband/hw/hns/hns_roce_hw_v2.c:2657:29: sparse: incorrect type in assignment (different base types) @@ expected restricted __le32 wqe_sge_ba @@ got unsignrestricted __le32 wqe_sge_ba @@ drivers/infiniband/hw/hns/hns_roce_hw_v2.c:2657:29: expected restricted __le32 wqe_sge_ba drivers/infiniband/hw/hns/hns_roce_hw_v2.c:2657:29: got unsigned int <noident> >> drivers/infiniband/hw/hns/hns_roce_hw_v2.c:2720:34: sparse: incorrect type in assignment (different base types) @@ expected restricted __le32 rq_cur_blk_addr @@ got unsignrestricted __le32 rq_cur_blk_addr @@ drivers/infiniband/hw/hns/hns_roce_hw_v2.c:2720:34: expected restricted __le32 rq_cur_blk_addr drivers/infiniband/hw/hns/hns_roce_hw_v2.c:2720:34: got unsigned int <noident> >> drivers/infiniband/hw/hns/hns_roce_hw_v2.c:2733:34: sparse: incorrect type in assignment (different base types) @@ expected restricted __le32 rq_nxt_blk_addr @@ got unsignrestricted __le32 rq_nxt_blk_addr @@ drivers/infiniband/hw/hns/hns_roce_hw_v2.c:2733:34: expected restricted __le32 rq_nxt_blk_addr drivers/infiniband/hw/hns/hns_roce_hw_v2.c:2733:34: got unsigned int <noident> >> drivers/infiniband/hw/hns/hns_roce_hw_v2.c:2757:26: sparse: incorrect type in assignment (different base types) @@ expected restricted __le32 trrl_ba @@ got unsignrestricted __le32 trrl_ba @@ drivers/infiniband/hw/hns/hns_roce_hw_v2.c:2757:26: expected restricted __le32 trrl_ba drivers/infiniband/hw/hns/hns_roce_hw_v2.c:2757:26: got unsigned int <noident> >> drivers/infiniband/hw/hns/hns_roce_hw_v2.c:2765:26: sparse: incorrect type in assignment (different base types) @@ expected restricted __le32 irrl_ba @@ got unsignrestricted __le32 irrl_ba @@ drivers/infiniband/hw/hns/hns_roce_hw_v2.c:2765:26: expected restricted __le32 irrl_ba drivers/infiniband/hw/hns/hns_roce_hw_v2.c:2765:26: got unsigned int <noident> drivers/infiniband/hw/hns/hns_roce_hw_v2.c:2776:9: sparse: cast from restricted __le32 >> drivers/infiniband/hw/hns/hns_roce_hw_v2.c:2944:34: sparse: incorrect type in assignment (different base types) @@ expected restricted __le32 sq_cur_blk_addr @@ got unsignrestricted __le32 sq_cur_blk_addr @@ drivers/infiniband/hw/hns/hns_roce_hw_v2.c:2944:34: expected restricted __le32 sq_cur_blk_addr drivers/infiniband/hw/hns/hns_roce_hw_v2.c:2944:34: got unsigned int <noident> >> drivers/infiniband/hw/hns/hns_roce_hw_v2.c:2955:38: sparse: incorrect type in assignment (different base types) @@ expected restricted __le32 sq_cur_sge_blk_addr @@ got sq_cur_sge_blk_addr @@ drivers/infiniband/hw/hns/hns_roce_hw_v2.c:2955:38: expected restricted __le32 sq_cur_sge_blk_addr drivers/infiniband/hw/hns/hns_roce_hw_v2.c:2955:38: got unsigned int >> drivers/infiniband/hw/hns/hns_roce_hw_v2.c:2970:37: sparse: incorrect type in assignment (different base types) @@ expected restricted __le32 rx_sq_cur_blk_addr @@ got unsignrestricted __le32 rx_sq_cur_blk_addr @@ drivers/infiniband/hw/hns/hns_roce_hw_v2.c:2970:37: expected restricted __le32 rx_sq_cur_blk_addr drivers/infiniband/hw/hns/hns_roce_hw_v2.c:2970:37: got unsigned int <noident> >> drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3368:28: sparse: incorrect type in assignment (different base types) @@ expected unsigned char rnr_retry @@ got d char rnr_retry @@ drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3368:28: expected unsigned char rnr_retry drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3368:28: got restricted __le32 rq_rnr_timer drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3521:17: sparse: invalid assignment: &= drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3521:17: left side has type unsigned int drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3521:17: right side has type restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3521:17: sparse: invalid assignment: |= drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3521:17: left side has type unsigned int drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3521:17: right side has type restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3527:17: sparse: invalid assignment: &= drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3527:17: left side has type unsigned int drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3527:17: right side has type restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3527:17: sparse: invalid assignment: |= drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3527:17: left side has type unsigned int drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3527:17: right side has type restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3530:17: sparse: invalid assignment: &= drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3530:17: left side has type unsigned int drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3530:17: right side has type restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3530:17: sparse: invalid assignment: |= drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3530:17: left side has type unsigned int drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3530:17: right side has type restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3537:9: sparse: invalid assignment: &= drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3537:9: left side has type unsigned int drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3537:9: right side has type restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3537:9: sparse: invalid assignment: |= drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3537:9: left side has type unsigned int drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3537:9: right side has type restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3541:28: sparse: incorrect type in argument 1 (different base types) @@ expected restricted __be32 @@ got 2 @@ drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3541:28: expected restricted __be32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3541:28: got unsigned int drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3552:20: sparse: cast to restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3583:20: sparse: cast to restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3620:15: sparse: cast to restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3654:15: sparse: cast to restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3710:17: sparse: cast to restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3729:30: sparse: cast to restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3828:20: sparse: cast to restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3847:23: sparse: cast to restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3895:13: sparse: cast to restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3898:17: sparse: invalid assignment: &= drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3898:17: left side has type unsigned int drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3898:17: right side has type restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3898:17: sparse: invalid assignment: |= drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3898:17: left side has type unsigned int drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3898:17: right side has type restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3901:17: sparse: invalid assignment: &= drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3901:17: left side has type unsigned int drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3901:17: right side has type restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3901:17: sparse: invalid assignment: |= drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3901:17: left side has type unsigned int drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3901:17: right side has type restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3905:20: sparse: cast to restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3908:17: sparse: invalid assignment: &= drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3908:17: left side has type unsigned int drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3908:17: right side has type restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3908:17: sparse: invalid assignment: |= drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3908:17: left side has type unsigned int drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3908:17: right side has type restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3911:17: sparse: invalid assignment: &= drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3911:17: left side has type unsigned int drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3911:17: right side has type restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3911:17: sparse: invalid assignment: |= drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3911:17: left side has type unsigned int drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3911:17: right side has type restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3915:20: sparse: cast to restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3918:17: sparse: invalid assignment: &= drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3918:17: left side has type unsigned int drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3918:17: right side has type restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3918:17: sparse: invalid assignment: |= drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3918:17: left side has type unsigned int drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3918:17: right side has type restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3921:17: sparse: invalid assignment: &= drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3921:17: left side has type unsigned int drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3921:17: right side has type restricted __le32 drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3921:17: sparse: invalid assignment: |= drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3921:17: left side has type unsigned int drivers/infiniband/hw/hns/hns_roce_hw_v2.c:3921:17: right side has type restricted __le32 -- >> drivers/infiniband/hw/hns/hns_roce_hem.c:300:17: sparse: invalid assignment: &= drivers/infiniband/hw/hns/hns_roce_hem.c:300:17: left side has type unsigned int drivers/infiniband/hw/hns/hns_roce_hem.c:300:17: right side has type restricted __le32 drivers/infiniband/hw/hns/hns_roce_hem.c:300:17: sparse: invalid assignment: |= drivers/infiniband/hw/hns/hns_roce_hem.c:300:17: left side has type unsigned int drivers/infiniband/hw/hns/hns_roce_hem.c:300:17: right side has type restricted __le32 drivers/infiniband/hw/hns/hns_roce_hem.c:304:17: sparse: invalid assignment: &= drivers/infiniband/hw/hns/hns_roce_hem.c:304:17: left side has type unsigned int drivers/infiniband/hw/hns/hns_roce_hem.c:304:17: right side has type restricted __le32 drivers/infiniband/hw/hns/hns_roce_hem.c:304:17: sparse: invalid assignment: |= drivers/infiniband/hw/hns/hns_roce_hem.c:304:17: left side has type unsigned int drivers/infiniband/hw/hns/hns_roce_hem.c:304:17: right side has type restricted __le32 drivers/infiniband/hw/hns/hns_roce_hem.c:309:17: sparse: invalid assignment: &= drivers/infiniband/hw/hns/hns_roce_hem.c:309:17: left side has type unsigned int drivers/infiniband/hw/hns/hns_roce_hem.c:309:17: right side has type restricted __le32 drivers/infiniband/hw/hns/hns_roce_hem.c:309:17: sparse: invalid assignment: |= drivers/infiniband/hw/hns/hns_roce_hem.c:309:17: left side has type unsigned int drivers/infiniband/hw/hns/hns_roce_hem.c:309:17: right side has type restricted __le32 drivers/infiniband/hw/hns/hns_roce_hem.c:313:17: sparse: invalid assignment: &= drivers/infiniband/hw/hns/hns_roce_hem.c:313:17: left side has type unsigned int drivers/infiniband/hw/hns/hns_roce_hem.c:313:17: right side has type restricted __le32 drivers/infiniband/hw/hns/hns_roce_hem.c:313:17: sparse: invalid assignment: |= drivers/infiniband/hw/hns/hns_roce_hem.c:313:17: left side has type unsigned int drivers/infiniband/hw/hns/hns_roce_hem.c:313:17: right side has type restricted __le32 drivers/infiniband/hw/hns/hns_roce_hem.c:320:9: sparse: invalid assignment: &= drivers/infiniband/hw/hns/hns_roce_hem.c:320:9: left side has type unsigned int drivers/infiniband/hw/hns/hns_roce_hem.c:320:9: right side has type restricted __le32 drivers/infiniband/hw/hns/hns_roce_hem.c:320:9: sparse: invalid assignment: |= drivers/infiniband/hw/hns/hns_roce_hem.c:320:9: left side has type unsigned int drivers/infiniband/hw/hns/hns_roce_hem.c:320:9: right side has type restricted __le32 drivers/infiniband/hw/hns/hns_roce_hem.c:322:9: sparse: invalid assignment: &= drivers/infiniband/hw/hns/hns_roce_hem.c:322:9: left side has type unsigned int drivers/infiniband/hw/hns/hns_roce_hem.c:322:9: right side has type restricted __le32 drivers/infiniband/hw/hns/hns_roce_hem.c:322:9: sparse: invalid assignment: |= drivers/infiniband/hw/hns/hns_roce_hem.c:322:9: left side has type unsigned int drivers/infiniband/hw/hns/hns_roce_hem.c:322:9: right side has type restricted __le32 drivers/infiniband/hw/hns/hns_roce_hem.c:323:9: sparse: invalid assignment: &= drivers/infiniband/hw/hns/hns_roce_hem.c:323:9: left side has type unsigned int drivers/infiniband/hw/hns/hns_roce_hem.c:323:9: right side has type restricted __le32 drivers/infiniband/hw/hns/hns_roce_hem.c:323:9: sparse: invalid assignment: |= drivers/infiniband/hw/hns/hns_roce_hem.c:323:9: left side has type unsigned int drivers/infiniband/hw/hns/hns_roce_hem.c:323:9: right side has type restricted __le32 drivers/infiniband/hw/hns/hns_roce_hem.c:349:17: sparse: invalid assignment: &= drivers/infiniband/hw/hns/hns_roce_hem.c:349:17: left side has type unsigned int drivers/infiniband/hw/hns/hns_roce_hem.c:349:17: right side has type restricted __le32 drivers/infiniband/hw/hns/hns_roce_hem.c:349:17: sparse: invalid assignment: |= drivers/infiniband/hw/hns/hns_roce_hem.c:349:17: left side has type unsigned int drivers/infiniband/hw/hns/hns_roce_hem.c:349:17: right side has type restricted __le32 drivers/infiniband/hw/hns/hns_roce_hem.c:355:36: sparse: incorrect type in argument 1 (different base types) @@ expected restricted __be32 @@ got 2 @@ drivers/infiniband/hw/hns/hns_roce_hem.c:355:36: expected restricted __be32 drivers/infiniband/hw/hns/hns_roce_hem.c:355:36: got unsigned int vim +699 drivers/infiniband/hw/hns/hns_roce_qp.c 9a4435375c oulijun 2016-07-21 491 9a4435375c oulijun 2016-07-21 492 static int hns_roce_create_qp_common(struct hns_roce_dev *hr_dev, 9a4435375c oulijun 2016-07-21 493 struct ib_pd *ib_pd, 9a4435375c oulijun 2016-07-21 494 struct ib_qp_init_attr *init_attr, 9a4435375c oulijun 2016-07-21 495 struct ib_udata *udata, unsigned long sqpn, 9a4435375c oulijun 2016-07-21 496 struct hns_roce_qp *hr_qp) 9a4435375c oulijun 2016-07-21 497 { 13ca970e36 Wei Hu(Xavier 2017-08-30 498) struct device *dev = hr_dev->dev; 9a4435375c oulijun 2016-07-21 499 struct hns_roce_ib_create_qp ucmd; 9a4435375c oulijun 2016-07-21 500 unsigned long qpn = 0; 9a4435375c oulijun 2016-07-21 501 int ret = 0; 9a8982dc89 Wei Hu(Xavier 2017-10-18 502) u32 page_shift; 9a8982dc89 Wei Hu(Xavier 2017-10-18 503) u32 npages; 0009c2dbe8 oulijun 2018-01-03 504 int i; 9a4435375c oulijun 2016-07-21 505 9a4435375c oulijun 2016-07-21 506 mutex_init(&hr_qp->mutex); 9a4435375c oulijun 2016-07-21 507 spin_lock_init(&hr_qp->sq.lock); 9a4435375c oulijun 2016-07-21 508 spin_lock_init(&hr_qp->rq.lock); 9a4435375c oulijun 2016-07-21 509 9a4435375c oulijun 2016-07-21 510 hr_qp->state = IB_QPS_RESET; 9a4435375c oulijun 2016-07-21 511 b66efc9320 oulijun 2018-01-10 512 hr_qp->ibqp.qp_type = init_attr->qp_type; b66efc9320 oulijun 2018-01-10 513 9a4435375c oulijun 2016-07-21 514 if (init_attr->sq_sig_type == IB_SIGNAL_ALL_WR) b61a3016b4 Lijun Ou 2018-01-30 515 hr_qp->sq_signal_bits = cpu_to_le32(IB_SIGNAL_ALL_WR); 9a4435375c oulijun 2016-07-21 516 else b61a3016b4 Lijun Ou 2018-01-30 517 hr_qp->sq_signal_bits = cpu_to_le32(IB_SIGNAL_REQ_WR); 9a4435375c oulijun 2016-07-21 518 9a4435375c oulijun 2016-07-21 519 ret = hns_roce_set_rq_size(hr_dev, &init_attr->cap, !!ib_pd->uobject, 9a4435375c oulijun 2016-07-21 520 !!init_attr->srq, hr_qp); 9a4435375c oulijun 2016-07-21 521 if (ret) { 9a4435375c oulijun 2016-07-21 522 dev_err(dev, "hns_roce_set_rq_size failed\n"); 9a4435375c oulijun 2016-07-21 523 goto err_out; 9a4435375c oulijun 2016-07-21 524 } 9a4435375c oulijun 2016-07-21 525 0009c2dbe8 oulijun 2018-01-03 526 if (hr_dev->caps.flags & HNS_ROCE_CAP_FLAG_RQ_INLINE) { 0009c2dbe8 oulijun 2018-01-03 527 /* allocate recv inline buf */ 0009c2dbe8 oulijun 2018-01-03 528 hr_qp->rq_inl_buf.wqe_list = kcalloc(hr_qp->rq.wqe_cnt, 0009c2dbe8 oulijun 2018-01-03 529 sizeof(struct hns_roce_rinl_wqe), 0009c2dbe8 oulijun 2018-01-03 530 GFP_KERNEL); 0009c2dbe8 oulijun 2018-01-03 531 if (!hr_qp->rq_inl_buf.wqe_list) { 0009c2dbe8 oulijun 2018-01-03 532 ret = -ENOMEM; 0009c2dbe8 oulijun 2018-01-03 533 goto err_out; 0009c2dbe8 oulijun 2018-01-03 534 } 0009c2dbe8 oulijun 2018-01-03 535 0009c2dbe8 oulijun 2018-01-03 536 hr_qp->rq_inl_buf.wqe_cnt = hr_qp->rq.wqe_cnt; 0009c2dbe8 oulijun 2018-01-03 537 0009c2dbe8 oulijun 2018-01-03 538 /* Firstly, allocate a list of sge space buffer */ 0009c2dbe8 oulijun 2018-01-03 539 hr_qp->rq_inl_buf.wqe_list[0].sg_list = 0009c2dbe8 oulijun 2018-01-03 540 kcalloc(hr_qp->rq_inl_buf.wqe_cnt, 0009c2dbe8 oulijun 2018-01-03 541 init_attr->cap.max_recv_sge * 0009c2dbe8 oulijun 2018-01-03 542 sizeof(struct hns_roce_rinl_sge), 0009c2dbe8 oulijun 2018-01-03 543 GFP_KERNEL); 0009c2dbe8 oulijun 2018-01-03 544 if (!hr_qp->rq_inl_buf.wqe_list[0].sg_list) { 0009c2dbe8 oulijun 2018-01-03 545 ret = -ENOMEM; 0009c2dbe8 oulijun 2018-01-03 546 goto err_wqe_list; 0009c2dbe8 oulijun 2018-01-03 547 } 0009c2dbe8 oulijun 2018-01-03 548 0009c2dbe8 oulijun 2018-01-03 549 for (i = 1; i < hr_qp->rq_inl_buf.wqe_cnt; i++) 0009c2dbe8 oulijun 2018-01-03 550 /* Secondly, reallocate the buffer */ 0009c2dbe8 oulijun 2018-01-03 551 hr_qp->rq_inl_buf.wqe_list[i].sg_list = 0009c2dbe8 oulijun 2018-01-03 552 &hr_qp->rq_inl_buf.wqe_list[0].sg_list[i * 0009c2dbe8 oulijun 2018-01-03 553 init_attr->cap.max_recv_sge]; 0009c2dbe8 oulijun 2018-01-03 554 } 0009c2dbe8 oulijun 2018-01-03 555 9a4435375c oulijun 2016-07-21 556 if (ib_pd->uobject) { 9a4435375c oulijun 2016-07-21 557 if (ib_copy_from_udata(&ucmd, udata, sizeof(ucmd))) { 9a4435375c oulijun 2016-07-21 558 dev_err(dev, "ib_copy_from_udata error for create qp\n"); 9a4435375c oulijun 2016-07-21 559 ret = -EFAULT; 0009c2dbe8 oulijun 2018-01-03 560 goto err_rq_sge_list; 9a4435375c oulijun 2016-07-21 561 } 9a4435375c oulijun 2016-07-21 562 926a01dc00 Wei Hu(Xavier 2017-08-30 563) ret = hns_roce_set_user_sq_size(hr_dev, &init_attr->cap, hr_qp, 926a01dc00 Wei Hu(Xavier 2017-08-30 564) &ucmd); 9a4435375c oulijun 2016-07-21 565 if (ret) { 9a4435375c oulijun 2016-07-21 566 dev_err(dev, "hns_roce_set_user_sq_size error for create qp\n"); 0009c2dbe8 oulijun 2018-01-03 567 goto err_rq_sge_list; 9a4435375c oulijun 2016-07-21 568 } 9a4435375c oulijun 2016-07-21 569 9a4435375c oulijun 2016-07-21 570 hr_qp->umem = ib_umem_get(ib_pd->uobject->context, 9a4435375c oulijun 2016-07-21 571 ucmd.buf_addr, hr_qp->buff_size, 0, 9a4435375c oulijun 2016-07-21 572 0); 9a4435375c oulijun 2016-07-21 573 if (IS_ERR(hr_qp->umem)) { 9a4435375c oulijun 2016-07-21 574 dev_err(dev, "ib_umem_get error for create qp\n"); 9a4435375c oulijun 2016-07-21 575 ret = PTR_ERR(hr_qp->umem); 0009c2dbe8 oulijun 2018-01-03 576 goto err_rq_sge_list; 9a4435375c oulijun 2016-07-21 577 } 9a4435375c oulijun 2016-07-21 578 9766edc34e Shaobo Xu 2017-08-30 579 hr_qp->mtt.mtt_type = MTT_TYPE_WQE; 9a8982dc89 Wei Hu(Xavier 2017-10-18 580) if (hr_dev->caps.mtt_buf_pg_sz) { 9a8982dc89 Wei Hu(Xavier 2017-10-18 581) npages = (ib_umem_page_count(hr_qp->umem) + 9a8982dc89 Wei Hu(Xavier 2017-10-18 582) (1 << hr_dev->caps.mtt_buf_pg_sz) - 1) / 9a8982dc89 Wei Hu(Xavier 2017-10-18 583) (1 << hr_dev->caps.mtt_buf_pg_sz); 9a8982dc89 Wei Hu(Xavier 2017-10-18 584) page_shift = PAGE_SHIFT + hr_dev->caps.mtt_buf_pg_sz; 9a8982dc89 Wei Hu(Xavier 2017-10-18 585) ret = hns_roce_mtt_init(hr_dev, npages, 9a8982dc89 Wei Hu(Xavier 2017-10-18 586) page_shift, 9a8982dc89 Wei Hu(Xavier 2017-10-18 587) &hr_qp->mtt); 9a8982dc89 Wei Hu(Xavier 2017-10-18 588) } else { 9a8982dc89 Wei Hu(Xavier 2017-10-18 589) ret = hns_roce_mtt_init(hr_dev, 9a8982dc89 Wei Hu(Xavier 2017-10-18 590) ib_umem_page_count(hr_qp->umem), 9a8982dc89 Wei Hu(Xavier 2017-10-18 591) hr_qp->umem->page_shift, 9a8982dc89 Wei Hu(Xavier 2017-10-18 592) &hr_qp->mtt); 9a8982dc89 Wei Hu(Xavier 2017-10-18 593) } 9a4435375c oulijun 2016-07-21 594 if (ret) { 9a4435375c oulijun 2016-07-21 595 dev_err(dev, "hns_roce_mtt_init error for create qp\n"); 9a4435375c oulijun 2016-07-21 596 goto err_buf; 9a4435375c oulijun 2016-07-21 597 } 9a4435375c oulijun 2016-07-21 598 9a4435375c oulijun 2016-07-21 599 ret = hns_roce_ib_umem_write_mtt(hr_dev, &hr_qp->mtt, 9a4435375c oulijun 2016-07-21 600 hr_qp->umem); 9a4435375c oulijun 2016-07-21 601 if (ret) { 9a4435375c oulijun 2016-07-21 602 dev_err(dev, "hns_roce_ib_umem_write_mtt error for create qp\n"); 9a4435375c oulijun 2016-07-21 603 goto err_mtt; 9a4435375c oulijun 2016-07-21 604 } 9a4435375c oulijun 2016-07-21 605 } else { 9a4435375c oulijun 2016-07-21 606 if (init_attr->create_flags & 9a4435375c oulijun 2016-07-21 607 IB_QP_CREATE_BLOCK_MULTICAST_LOOPBACK) { 9a4435375c oulijun 2016-07-21 608 dev_err(dev, "init_attr->create_flags error!\n"); 9a4435375c oulijun 2016-07-21 609 ret = -EINVAL; 0009c2dbe8 oulijun 2018-01-03 610 goto err_rq_sge_list; 9a4435375c oulijun 2016-07-21 611 } 9a4435375c oulijun 2016-07-21 612 9a4435375c oulijun 2016-07-21 613 if (init_attr->create_flags & IB_QP_CREATE_IPOIB_UD_LSO) { 9a4435375c oulijun 2016-07-21 614 dev_err(dev, "init_attr->create_flags error!\n"); 9a4435375c oulijun 2016-07-21 615 ret = -EINVAL; 0009c2dbe8 oulijun 2018-01-03 616 goto err_rq_sge_list; 9a4435375c oulijun 2016-07-21 617 } 9a4435375c oulijun 2016-07-21 618 9a4435375c oulijun 2016-07-21 619 /* Set SQ size */ 9a4435375c oulijun 2016-07-21 620 ret = hns_roce_set_kernel_sq_size(hr_dev, &init_attr->cap, 76445703e5 Lijun Ou 2016-09-20 621 hr_qp); 9a4435375c oulijun 2016-07-21 622 if (ret) { 9a4435375c oulijun 2016-07-21 623 dev_err(dev, "hns_roce_set_kernel_sq_size error!\n"); 0009c2dbe8 oulijun 2018-01-03 624 goto err_rq_sge_list; 9a4435375c oulijun 2016-07-21 625 } 9a4435375c oulijun 2016-07-21 626 9a4435375c oulijun 2016-07-21 627 /* QP doorbell register address */ 2d40788825 Wei Hu(Xavier 2017-08-30 628) hr_qp->sq.db_reg_l = hr_dev->reg_base + hr_dev->sdb_offset + 9a4435375c oulijun 2016-07-21 629 DB_REG_OFFSET * hr_dev->priv_uar.index; 2d40788825 Wei Hu(Xavier 2017-08-30 630) hr_qp->rq.db_reg_l = hr_dev->reg_base + hr_dev->odb_offset + 9a4435375c oulijun 2016-07-21 631 DB_REG_OFFSET * hr_dev->priv_uar.index; 9a4435375c oulijun 2016-07-21 632 9a4435375c oulijun 2016-07-21 633 /* Allocate QP buf */ 9a8982dc89 Wei Hu(Xavier 2017-10-18 634) page_shift = PAGE_SHIFT + hr_dev->caps.mtt_buf_pg_sz; 9a8982dc89 Wei Hu(Xavier 2017-10-18 635) if (hns_roce_buf_alloc(hr_dev, hr_qp->buff_size, 9a8982dc89 Wei Hu(Xavier 2017-10-18 636) (1 << page_shift) * 2, 9a8982dc89 Wei Hu(Xavier 2017-10-18 637) &hr_qp->hr_buf, page_shift)) { 9a4435375c oulijun 2016-07-21 638 dev_err(dev, "hns_roce_buf_alloc error!\n"); 9a4435375c oulijun 2016-07-21 639 ret = -ENOMEM; 0009c2dbe8 oulijun 2018-01-03 640 goto err_rq_sge_list; 9a4435375c oulijun 2016-07-21 641 } 9a4435375c oulijun 2016-07-21 642 9766edc34e Shaobo Xu 2017-08-30 643 hr_qp->mtt.mtt_type = MTT_TYPE_WQE; 9a4435375c oulijun 2016-07-21 644 /* Write MTT */ 9a4435375c oulijun 2016-07-21 645 ret = hns_roce_mtt_init(hr_dev, hr_qp->hr_buf.npages, 9a4435375c oulijun 2016-07-21 646 hr_qp->hr_buf.page_shift, &hr_qp->mtt); 9a4435375c oulijun 2016-07-21 647 if (ret) { 9a4435375c oulijun 2016-07-21 648 dev_err(dev, "hns_roce_mtt_init error for kernel create qp\n"); 9a4435375c oulijun 2016-07-21 649 goto err_buf; 9a4435375c oulijun 2016-07-21 650 } 9a4435375c oulijun 2016-07-21 651 9a4435375c oulijun 2016-07-21 652 ret = hns_roce_buf_write_mtt(hr_dev, &hr_qp->mtt, 9a4435375c oulijun 2016-07-21 653 &hr_qp->hr_buf); 9a4435375c oulijun 2016-07-21 654 if (ret) { 9a4435375c oulijun 2016-07-21 655 dev_err(dev, "hns_roce_buf_write_mtt error for kernel create qp\n"); 9a4435375c oulijun 2016-07-21 656 goto err_mtt; 9a4435375c oulijun 2016-07-21 657 } 9a4435375c oulijun 2016-07-21 658 9a4435375c oulijun 2016-07-21 659 hr_qp->sq.wrid = kmalloc_array(hr_qp->sq.wqe_cnt, sizeof(u64), 9a4435375c oulijun 2016-07-21 660 GFP_KERNEL); 9a4435375c oulijun 2016-07-21 661 hr_qp->rq.wrid = kmalloc_array(hr_qp->rq.wqe_cnt, sizeof(u64), 9a4435375c oulijun 2016-07-21 662 GFP_KERNEL); 9a4435375c oulijun 2016-07-21 663 if (!hr_qp->sq.wrid || !hr_qp->rq.wrid) { 9a4435375c oulijun 2016-07-21 664 ret = -ENOMEM; 9a4435375c oulijun 2016-07-21 665 goto err_wrid; 9a4435375c oulijun 2016-07-21 666 } 9a4435375c oulijun 2016-07-21 667 } 9a4435375c oulijun 2016-07-21 668 9a4435375c oulijun 2016-07-21 669 if (sqpn) { 9a4435375c oulijun 2016-07-21 670 qpn = sqpn; 9a4435375c oulijun 2016-07-21 671 } else { 9a4435375c oulijun 2016-07-21 672 /* Get QPN */ 9a4435375c oulijun 2016-07-21 673 ret = hns_roce_reserve_range_qp(hr_dev, 1, 1, &qpn); 9a4435375c oulijun 2016-07-21 674 if (ret) { 9a4435375c oulijun 2016-07-21 675 dev_err(dev, "hns_roce_reserve_range_qp alloc qpn error\n"); 9a4435375c oulijun 2016-07-21 676 goto err_wrid; 9a4435375c oulijun 2016-07-21 677 } 9a4435375c oulijun 2016-07-21 678 } 9a4435375c oulijun 2016-07-21 679 926a01dc00 Wei Hu(Xavier 2017-08-30 680) if (init_attr->qp_type == IB_QPT_GSI && 926a01dc00 Wei Hu(Xavier 2017-08-30 681) hr_dev->hw_rev == HNS_ROCE_HW_VER1) { 926a01dc00 Wei Hu(Xavier 2017-08-30 682) /* In v1 engine, GSI QP context in RoCE engine's register */ 9a4435375c oulijun 2016-07-21 683 ret = hns_roce_gsi_qp_alloc(hr_dev, qpn, hr_qp); 9a4435375c oulijun 2016-07-21 684 if (ret) { 9a4435375c oulijun 2016-07-21 685 dev_err(dev, "hns_roce_qp_alloc failed!\n"); 9a4435375c oulijun 2016-07-21 686 goto err_qpn; 9a4435375c oulijun 2016-07-21 687 } 9a4435375c oulijun 2016-07-21 688 } else { 9a4435375c oulijun 2016-07-21 689 ret = hns_roce_qp_alloc(hr_dev, qpn, hr_qp); 9a4435375c oulijun 2016-07-21 690 if (ret) { 9a4435375c oulijun 2016-07-21 691 dev_err(dev, "hns_roce_qp_alloc failed!\n"); 9a4435375c oulijun 2016-07-21 692 goto err_qpn; 9a4435375c oulijun 2016-07-21 693 } 9a4435375c oulijun 2016-07-21 694 } 9a4435375c oulijun 2016-07-21 695 9a4435375c oulijun 2016-07-21 696 if (sqpn) 9a4435375c oulijun 2016-07-21 697 hr_qp->doorbell_qpn = 1; 9a4435375c oulijun 2016-07-21 698 else 9a4435375c oulijun 2016-07-21 @699 hr_qp->doorbell_qpn = cpu_to_le64(hr_qp->qpn); 9a4435375c oulijun 2016-07-21 700 9a4435375c oulijun 2016-07-21 701 hr_qp->event = hns_roce_ib_qp_event; 9a4435375c oulijun 2016-07-21 702 9a4435375c oulijun 2016-07-21 703 return 0; 9a4435375c oulijun 2016-07-21 704 9a4435375c oulijun 2016-07-21 705 err_qpn: 9a4435375c oulijun 2016-07-21 706 if (!sqpn) 9a4435375c oulijun 2016-07-21 707 hns_roce_release_range_qp(hr_dev, qpn, 1); 9a4435375c oulijun 2016-07-21 708 9a4435375c oulijun 2016-07-21 709 err_wrid: 9a4435375c oulijun 2016-07-21 710 kfree(hr_qp->sq.wrid); 9a4435375c oulijun 2016-07-21 711 kfree(hr_qp->rq.wrid); 9a4435375c oulijun 2016-07-21 712 9a4435375c oulijun 2016-07-21 713 err_mtt: 9a4435375c oulijun 2016-07-21 714 hns_roce_mtt_cleanup(hr_dev, &hr_qp->mtt); 9a4435375c oulijun 2016-07-21 715 9a4435375c oulijun 2016-07-21 716 err_buf: 9a4435375c oulijun 2016-07-21 717 if (ib_pd->uobject) 9a4435375c oulijun 2016-07-21 718 ib_umem_release(hr_qp->umem); 9a4435375c oulijun 2016-07-21 719 else 9a4435375c oulijun 2016-07-21 720 hns_roce_buf_free(hr_dev, hr_qp->buff_size, &hr_qp->hr_buf); 9a4435375c oulijun 2016-07-21 721 0009c2dbe8 oulijun 2018-01-03 722 err_rq_sge_list: 0009c2dbe8 oulijun 2018-01-03 723 if (hr_dev->caps.flags & HNS_ROCE_CAP_FLAG_RQ_INLINE) 0009c2dbe8 oulijun 2018-01-03 724 kfree(hr_qp->rq_inl_buf.wqe_list[0].sg_list); 0009c2dbe8 oulijun 2018-01-03 725 0009c2dbe8 oulijun 2018-01-03 726 err_wqe_list: 0009c2dbe8 oulijun 2018-01-03 727 if (hr_dev->caps.flags & HNS_ROCE_CAP_FLAG_RQ_INLINE) 0009c2dbe8 oulijun 2018-01-03 728 kfree(hr_qp->rq_inl_buf.wqe_list); 0009c2dbe8 oulijun 2018-01-03 729 9a4435375c oulijun 2016-07-21 730 err_out: 9a4435375c oulijun 2016-07-21 731 return ret; 9a4435375c oulijun 2016-07-21 732 } 9a4435375c oulijun 2016-07-21 733 :::::: The code at line 699 was first introduced by commit :::::: 9a4435375cd151e07c0c38fa601b00115986091b IB/hns: Add driver files for hns RoCE driver :::::: TO: oulijun <oulijun@huawei.com> :::::: CC: Doug Ledford <dledford@redhat.com> --- 0-DAY kernel test infrastructure Open Source Technology Center https://lists.01.org/pipermail/kbuild-all Intel Corporation -- To unsubscribe from this list: send the line "unsubscribe linux-rdma" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html

diff --git a/drivers/infiniband/hw/hns/hns_roce_common.h b/drivers/infiniband/hw/hns/hns_roce_common.h index dd67faf..319cb74 100644 --- a/drivers/infiniband/hw/hns/hns_roce_common.h +++ b/drivers/infiniband/hw/hns/hns_roce_common.h @@ -43,15 +43,15 @@ __raw_writel((__force u32)cpu_to_le32(value), (addr)) #define roce_get_field(origin, mask, shift) \ - (((origin) & (mask)) >> (shift)) + (((le32_to_cpu(origin)) & (mask)) >> (shift)) #define roce_get_bit(origin, shift) \ roce_get_field((origin), (1ul << (shift)), (shift)) #define roce_set_field(origin, mask, shift, val) \ do { \ - (origin) &= (~(mask)); \ - (origin) |= (((u32)(val) << (shift)) & (mask)); \ + (origin) &= ~cpu_to_le32(mask); \ + (origin) |= cpu_to_le32(((u32)(val) << (shift)) & (mask)); \ } while (0) #define roce_set_bit(origin, shift, val) \ diff --git a/drivers/infiniband/hw/hns/hns_roce_device.h b/drivers/infiniband/hw/hns/hns_roce_device.h index 42c3b5a..2503d7f 100644 --- a/drivers/infiniband/hw/hns/hns_roce_device.h +++ b/drivers/infiniband/hw/hns/hns_roce_device.h @@ -466,7 +466,7 @@ struct hns_roce_qp { struct ib_qp ibqp; struct hns_roce_buf hr_buf; struct hns_roce_wq rq; - __le64 doorbell_qpn; + u32 doorbell_qpn; __le32 sq_signal_bits; u32 sq_next_wqe; int sq_max_wqes_per_wr; diff --git a/drivers/infiniband/hw/hns/hns_roce_hw_v1.c b/drivers/infiniband/hw/hns/hns_roce_hw_v1.c index 21ca9fa..b247f3d 100644 --- a/drivers/infiniband/hw/hns/hns_roce_hw_v1.c +++ b/drivers/infiniband/hw/hns/hns_roce_hw_v1.c @@ -195,23 +195,44 @@ static int hns_roce_v1_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr, memcpy(&ud_sq_wqe->dgid[0], &ah->av.dgid[0], GID_LEN); - ud_sq_wqe->va0_l = (u32)wr->sg_list[0].addr; - ud_sq_wqe->va0_h = (wr->sg_list[0].addr) >> 32; - ud_sq_wqe->l_key0 = wr->sg_list[0].lkey; - - ud_sq_wqe->va1_l = (u32)wr->sg_list[1].addr; - ud_sq_wqe->va1_h = (wr->sg_list[1].addr) >> 32; - ud_sq_wqe->l_key1 = wr->sg_list[1].lkey; + ud_sq_wqe->va0_l = + cpu_to_le32((u32)wr->sg_list[0].addr); + ud_sq_wqe->va0_h = + cpu_to_le32((wr->sg_list[0].addr) >> 32); + ud_sq_wqe->l_key0 = + cpu_to_le32(wr->sg_list[0].lkey); + + ud_sq_wqe->va1_l = + cpu_to_le32((u32)wr->sg_list[1].addr); + ud_sq_wqe->va1_h = + cpu_to_le32((wr->sg_list[1].addr) >> 32); + ud_sq_wqe->l_key1 = + cpu_to_le32(wr->sg_list[1].lkey); ind++; } else if (ibqp->qp_type == IB_QPT_RC) { ctrl = wqe; memset(ctrl, 0, sizeof(struct hns_roce_wqe_ctrl_seg)); for (i = 0; i < wr->num_sge; i++) - ctrl->msg_length += wr->sg_list[i].length; + ctrl->msg_length = + cpu_to_le32(le32_to_cpu(ctrl->msg_length) + + wr->sg_list[i].length); ctrl->sgl_pa_h = 0; ctrl->flag = 0; - ctrl->imm_data = send_ieth(wr); + + switch (wr->opcode) { + case IB_WR_SEND_WITH_IMM: + case IB_WR_RDMA_WRITE_WITH_IMM: + ctrl->imm_data = wr->ex.imm_data; + break; + case IB_WR_SEND_WITH_INV: + ctrl->inv_key = + cpu_to_le32(wr->ex.invalidate_rkey); + break; + default: + ctrl->imm_data = 0; + break; + } /*Ctrl field, ctrl set type: sig, solic, imm, fence */ /* SO wait for conforming application scenarios */ @@ -258,8 +279,8 @@ static int hns_roce_v1_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr, dseg = wqe; if (wr->send_flags & IB_SEND_INLINE && wr->num_sge) { - if (ctrl->msg_length > - hr_dev->caps.max_sq_inline) { + if (le32_to_cpu(ctrl->msg_length) > + hr_dev->caps.max_sq_inline) { ret = -EINVAL; *bad_wr = wr; dev_err(dev, "inline len(1-%d)=%d, illegal", @@ -273,7 +294,7 @@ static int hns_roce_v1_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr, wr->sg_list[i].length); wqe += wr->sg_list[i].length; } - ctrl->flag |= HNS_ROCE_WQE_INLINE; + ctrl->flag |= cpu_to_le32(HNS_ROCE_WQE_INLINE); } else { /*sqe num is two */ for (i = 0; i < wr->num_sge; i++) @@ -306,8 +327,8 @@ static int hns_roce_v1_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr, SQ_DOORBELL_U32_8_QPN_S, qp->doorbell_qpn); roce_set_bit(sq_db.u32_8, SQ_DOORBELL_HW_SYNC_S, 1); - doorbell[0] = sq_db.u32_4; - doorbell[1] = sq_db.u32_8; + doorbell[0] = le32_to_cpu(sq_db.u32_4); + doorbell[1] = le32_to_cpu(sq_db.u32_8); hns_roce_write64_k(doorbell, qp->sq.db_reg_l); qp->sq_next_wqe = ind; @@ -403,8 +424,8 @@ static int hns_roce_v1_post_recv(struct ib_qp *ibqp, struct ib_recv_wr *wr, roce_set_bit(rq_db.u32_8, RQ_DOORBELL_U32_8_HW_SYNC_S, 1); - doorbell[0] = rq_db.u32_4; - doorbell[1] = rq_db.u32_8; + doorbell[0] = le32_to_cpu(rq_db.u32_4); + doorbell[1] = le32_to_cpu(rq_db.u32_8); hns_roce_write64_k(doorbell, hr_qp->rq.db_reg_l); } @@ -2261,7 +2282,7 @@ static int hns_roce_v1_poll_one(struct hns_roce_cq *hr_cq, CQE_BYTE_4_WQE_INDEX_M, CQE_BYTE_4_WQE_INDEX_S)& ((*cur_qp)->sq.wqe_cnt-1)); - switch (sq_wqe->flag & HNS_ROCE_WQE_OPCODE_MASK) { + switch (le32_to_cpu(sq_wqe->flag) & HNS_ROCE_WQE_OPCODE_MASK) { case HNS_ROCE_WQE_OPCODE_SEND: wc->opcode = IB_WC_SEND; break; @@ -2282,7 +2303,7 @@ static int hns_roce_v1_poll_one(struct hns_roce_cq *hr_cq, wc->status = IB_WC_GENERAL_ERR; break; } - wc->wc_flags = (sq_wqe->flag & HNS_ROCE_WQE_IMM ? + wc->wc_flags = (le32_to_cpu(sq_wqe->flag) & HNS_ROCE_WQE_IMM ? IB_WC_WITH_IMM : 0); wq = &(*cur_qp)->sq; diff --git a/drivers/infiniband/hw/hns/hns_roce_hw_v1.h b/drivers/infiniband/hw/hns/hns_roce_hw_v1.h index b44ddd2..e9a2717 100644 --- a/drivers/infiniband/hw/hns/hns_roce_hw_v1.h +++ b/drivers/infiniband/hw/hns/hns_roce_hw_v1.h @@ -200,14 +200,14 @@ #define HNS_ROCE_AEQE_EVENT_CE_EVENT_CEQE_CEQN_M GENMASK(4, 0) struct hns_roce_cq_context { - u32 cqc_byte_4; - u32 cq_bt_l; - u32 cqc_byte_12; - u32 cur_cqe_ba0_l; - u32 cqc_byte_20; - u32 cqe_tptr_addr_l; - u32 cur_cqe_ba1_l; - u32 cqc_byte_32; + __le32 cqc_byte_4; + __le32 cq_bt_l; + __le32 cqc_byte_12; + __le32 cur_cqe_ba0_l; + __le32 cqc_byte_20; + __le32 cqe_tptr_addr_l; + __le32 cur_cqe_ba1_l; + __le32 cqc_byte_32; }; #define CQ_CONTEXT_CQC_BYTE_4_CQC_STATE_S 0 @@ -257,17 +257,17 @@ struct hns_roce_cq_context { (((1UL << 16) - 1) << CQ_CONTEXT_CQC_BYTE_32_CQ_CONS_IDX_S) struct hns_roce_cqe { - u32 cqe_byte_4; + __le32 cqe_byte_4; union { - u32 r_key; - u32 immediate_data; + __le32 r_key; + __be32 immediate_data; }; - u32 byte_cnt; - u32 cqe_byte_16; - u32 cqe_byte_20; - u32 s_mac_l; - u32 cqe_byte_28; - u32 reserved; + __le32 byte_cnt; + __le32 cqe_byte_16; + __le32 cqe_byte_20; + __le32 s_mac_l; + __le32 cqe_byte_28; + __le32 reserved; }; #define CQE_BYTE_4_OWNER_S 7 @@ -308,22 +308,22 @@ struct hns_roce_cqe { #define CQ_DB_REQ_NOT (1 << 16) struct hns_roce_v1_mpt_entry { - u32 mpt_byte_4; - u32 pbl_addr_l; - u32 mpt_byte_12; - u32 virt_addr_l; - u32 virt_addr_h; - u32 length; - u32 mpt_byte_28; - u32 pa0_l; - u32 mpt_byte_36; - u32 mpt_byte_40; - u32 mpt_byte_44; - u32 mpt_byte_48; - u32 pa4_l; - u32 mpt_byte_56; - u32 mpt_byte_60; - u32 mpt_byte_64; + __le32 mpt_byte_4; + __le32 pbl_addr_l; + __le32 mpt_byte_12; + __le32 virt_addr_l; + __le32 virt_addr_h; + __le32 length; + __le32 mpt_byte_28; + __le32 pa0_l; + __le32 mpt_byte_36; + __le32 mpt_byte_40; + __le32 mpt_byte_44; + __le32 mpt_byte_48; + __le32 pa4_l; + __le32 mpt_byte_56; + __le32 mpt_byte_60; + __le32 mpt_byte_64; }; #define MPT_BYTE_4_KEY_STATE_S 0 @@ -408,30 +408,32 @@ struct hns_roce_v1_mpt_entry { (((1UL << 8) - 1) << MPT_BYTE_64_L_KEY_IDX_H_S) struct hns_roce_wqe_ctrl_seg { - __be32 sgl_pa_h; - __be32 flag; - __be32 imm_data; - __be32 msg_length; + __le32 sgl_pa_h; + __le32 flag; + union { + __be32 imm_data; + __le32 inv_key; + }; + __le32 msg_length; }; struct hns_roce_wqe_data_seg { - __be64 addr; - __be32 lkey; - __be32 len; + __le64 addr; + __le32 lkey; + __le32 len; }; struct hns_roce_wqe_raddr_seg { - __be32 rkey; - __be32 len;/* reserved */ - __be64 raddr; + __le32 rkey; + __le32 len;/* reserved */ + __le64 raddr; }; struct hns_roce_rq_wqe_ctrl { - - u32 rwqe_byte_4; - u32 rocee_sgl_ba_l; - u32 rwqe_byte_12; - u32 reserved[5]; + __le32 rwqe_byte_4; + __le32 rocee_sgl_ba_l; + __le32 rwqe_byte_12; + __le32 reserved[5]; }; #define RQ_WQE_CTRL_RWQE_BYTE_12_RWQE_SGE_NUM_S 16 @@ -443,31 +445,31 @@ struct hns_roce_rq_wqe_ctrl { #define GID_LEN 16 struct hns_roce_ud_send_wqe { - u32 dmac_h; - u32 u32_8; - u32 immediate_data; + __le32 dmac_h; + __le32 u32_8; + __le32 immediate_data; - u32 u32_16; + __le32 u32_16; union { unsigned char dgid[GID_LEN]; struct { - u32 u32_20; - u32 u32_24; - u32 u32_28; - u32 u32_32; + __le32 u32_20; + __le32 u32_24; + __le32 u32_28; + __le32 u32_32; }; }; - u32 u32_36; - u32 u32_40; + __le32 u32_36; + __le32 u32_40; - u32 va0_l; - u32 va0_h; - u32 l_key0; + __le32 va0_l; + __le32 va0_h; + __le32 l_key0; - u32 va1_l; - u32 va1_h; - u32 l_key1; + __le32 va1_l; + __le32 va1_h; + __le32 l_key1; }; #define UD_SEND_WQE_U32_4_DMAC_0_S 0 @@ -535,16 +537,16 @@ struct hns_roce_ud_send_wqe { (((1UL << 8) - 1) << UD_SEND_WQE_U32_40_TRAFFIC_CLASS_S) struct hns_roce_sqp_context { - u32 qp1c_bytes_4; - u32 sq_rq_bt_l; - u32 qp1c_bytes_12; - u32 qp1c_bytes_16; - u32 qp1c_bytes_20; - u32 cur_rq_wqe_ba_l; - u32 qp1c_bytes_28; - u32 qp1c_bytes_32; - u32 cur_sq_wqe_ba_l; - u32 qp1c_bytes_40; + __le32 qp1c_bytes_4; + __le32 sq_rq_bt_l; + __le32 qp1c_bytes_12; + __le32 qp1c_bytes_16; + __le32 qp1c_bytes_20; + __le32 cur_rq_wqe_ba_l; + __le32 qp1c_bytes_28; + __le32 qp1c_bytes_32; + __le32 cur_sq_wqe_ba_l; + __le32 qp1c_bytes_40; }; #define QP1C_BYTES_4_QP_STATE_S 0 @@ -626,64 +628,64 @@ struct hns_roce_sqp_context { #define HNS_ROCE_WQE_OPCODE_MASK (15<<16) struct hns_roce_qp_context { - u32 qpc_bytes_4; - u32 qpc_bytes_8; - u32 qpc_bytes_12; - u32 qpc_bytes_16; - u32 sq_rq_bt_l; - u32 qpc_bytes_24; - u32 irrl_ba_l; - u32 qpc_bytes_32; - u32 qpc_bytes_36; - u32 dmac_l; - u32 qpc_bytes_44; - u32 qpc_bytes_48; - u8 dgid[16]; - u32 qpc_bytes_68; - u32 cur_rq_wqe_ba_l; - u32 qpc_bytes_76; - u32 rx_rnr_time; - u32 qpc_bytes_84; - u32 qpc_bytes_88; + __le32 qpc_bytes_4; + __le32 qpc_bytes_8; + __le32 qpc_bytes_12; + __le32 qpc_bytes_16; + __le32 sq_rq_bt_l; + __le32 qpc_bytes_24; + __le32 irrl_ba_l; + __le32 qpc_bytes_32; + __le32 qpc_bytes_36; + __le32 dmac_l; + __le32 qpc_bytes_44; + __le32 qpc_bytes_48; + u8 dgid[16]; + __le32 qpc_bytes_68; + __le32 cur_rq_wqe_ba_l; + __le32 qpc_bytes_76; + __le32 rx_rnr_time; + __le32 qpc_bytes_84; + __le32 qpc_bytes_88; union { - u32 rx_sge_len; - u32 dma_length; + __le32 rx_sge_len; + __le32 dma_length; }; union { - u32 rx_sge_num; - u32 rx_send_pktn; - u32 r_key; + __le32 rx_sge_num; + __le32 rx_send_pktn; + __le32 r_key; }; - u32 va_l; - u32 va_h; - u32 qpc_bytes_108; - u32 qpc_bytes_112; - u32 rx_cur_sq_wqe_ba_l; - u32 qpc_bytes_120; - u32 qpc_bytes_124; - u32 qpc_bytes_128; - u32 qpc_bytes_132; - u32 qpc_bytes_136; - u32 qpc_bytes_140; - u32 qpc_bytes_144; - u32 qpc_bytes_148; + __le32 va_l; + __le32 va_h; + __le32 qpc_bytes_108; + __le32 qpc_bytes_112; + __le32 rx_cur_sq_wqe_ba_l; + __le32 qpc_bytes_120; + __le32 qpc_bytes_124; + __le32 qpc_bytes_128; + __le32 qpc_bytes_132; + __le32 qpc_bytes_136; + __le32 qpc_bytes_140; + __le32 qpc_bytes_144; + __le32 qpc_bytes_148; union { - u32 rnr_retry; - u32 ack_time; + __le32 rnr_retry; + __le32 ack_time; }; - u32 qpc_bytes_156; - u32 pkt_use_len; - u32 qpc_bytes_164; - u32 qpc_bytes_168; + __le32 qpc_bytes_156; + __le32 pkt_use_len; + __le32 qpc_bytes_164; + __le32 qpc_bytes_168; union { - u32 sge_use_len; - u32 pa_use_len; + __le32 sge_use_len; + __le32 pa_use_len; }; - u32 qpc_bytes_176; - u32 qpc_bytes_180; - u32 tx_cur_sq_wqe_ba_l; - u32 qpc_bytes_188; - u32 rvd21; + __le32 qpc_bytes_176; + __le32 qpc_bytes_180; + __le32 tx_cur_sq_wqe_ba_l; + __le32 qpc_bytes_188; + __le32 rvd21; }; #define QP_CONTEXT_QPC_BYTES_4_TRANSPORT_SERVICE_TYPE_S 0 @@ -996,8 +998,8 @@ struct hns_roce_qp_context { #define HCR_GO_BIT 15 struct hns_roce_rq_db { - u32 u32_4; - u32 u32_8; + __le32 u32_4; + __le32 u32_8; }; #define RQ_DOORBELL_U32_4_RQ_HEAD_S 0 @@ -1013,8 +1015,8 @@ struct hns_roce_rq_db { #define RQ_DOORBELL_U32_8_HW_SYNC_S 31 struct hns_roce_sq_db { - u32 u32_4; - u32 u32_8; + __le32 u32_4; + __le32 u32_8; }; #define SQ_DOORBELL_U32_4_SQ_HEAD_S 0 diff --git a/drivers/infiniband/hw/hns/hns_roce_hw_v2.c b/drivers/infiniband/hw/hns/hns_roce_hw_v2.c index 256fe11..605202d 100644 --- a/drivers/infiniband/hw/hns/hns_roce_hw_v2.c +++ b/drivers/infiniband/hw/hns/hns_roce_hw_v2.c @@ -63,7 +63,8 @@ static int set_rwqe_data_seg(struct ib_qp *ibqp, struct ib_send_wr *wr, int i; if (wr->send_flags & IB_SEND_INLINE && wr->num_sge) { - if (rc_sq_wqe->msg_len > hr_dev->caps.max_sq_inline) { + if (le32_to_cpu(rc_sq_wqe->msg_len) > + hr_dev->caps.max_sq_inline) { *bad_wr = wr; dev_err(hr_dev->dev, "inline len(1-%d)=%d, illegal", rc_sq_wqe->msg_len, hr_dev->caps.max_sq_inline); @@ -218,9 +219,19 @@ static int hns_roce_v2_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr, HNS_ROCE_V2_WQE_OP_SEND); for (i = 0; i < wr->num_sge; i++) - ud_sq_wqe->msg_len += wr->sg_list[i].length; + ud_sq_wqe->msg_len = + cpu_to_le32(le32_to_cpu(ud_sq_wqe->msg_len) + + wr->sg_list[i].length); - ud_sq_wqe->immtdata = send_ieth(wr); + switch (wr->opcode) { + case IB_WR_SEND_WITH_IMM: + case IB_WR_RDMA_WRITE_WITH_IMM: + ud_sq_wqe->immtdata = wr->ex.imm_data; + break; + default: + ud_sq_wqe->immtdata = 0; + break; + } /* Set sig attr */ roce_set_bit(ud_sq_wqe->byte_4, @@ -254,8 +265,8 @@ static int hns_roce_v2_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr, V2_UD_SEND_WQE_BYTE_24_UDPSPN_M, V2_UD_SEND_WQE_BYTE_24_UDPSPN_S, 0); ud_sq_wqe->qkey = - cpu_to_be32(ud_wr(wr)->remote_qkey & 0x80000000) ? - qp->qkey : ud_wr(wr)->remote_qkey; + cpu_to_le32(ud_wr(wr)->remote_qkey & 0x80000000 ? + qp->qkey : ud_wr(wr)->remote_qkey); roce_set_field(ud_sq_wqe->byte_32, V2_UD_SEND_WQE_BYTE_32_DQPN_M, V2_UD_SEND_WQE_BYTE_32_DQPN_S, @@ -264,7 +275,7 @@ static int hns_roce_v2_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr, roce_set_field(ud_sq_wqe->byte_36, V2_UD_SEND_WQE_BYTE_36_VLAN_M, V2_UD_SEND_WQE_BYTE_36_VLAN_S, - ah->av.vlan); + le16_to_cpu(ah->av.vlan)); roce_set_field(ud_sq_wqe->byte_36, V2_UD_SEND_WQE_BYTE_36_HOPLIMIT_M, V2_UD_SEND_WQE_BYTE_36_HOPLIMIT_S, @@ -283,8 +294,8 @@ static int hns_roce_v2_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr, roce_set_field(ud_sq_wqe->byte_40, V2_UD_SEND_WQE_BYTE_40_SL_M, V2_UD_SEND_WQE_BYTE_40_SL_S, - ah->av.sl_tclass_flowlabel >> - HNS_ROCE_SL_SHIFT); + le32_to_cpu(ah->av.sl_tclass_flowlabel) >> + HNS_ROCE_SL_SHIFT); roce_set_field(ud_sq_wqe->byte_40, V2_UD_SEND_WQE_BYTE_40_PORTN_M, V2_UD_SEND_WQE_BYTE_40_PORTN_S, @@ -311,9 +322,23 @@ static int hns_roce_v2_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr, rc_sq_wqe = wqe; memset(rc_sq_wqe, 0, sizeof(*rc_sq_wqe)); for (i = 0; i < wr->num_sge; i++) - rc_sq_wqe->msg_len += wr->sg_list[i].length; + rc_sq_wqe->msg_len = + cpu_to_le32(le32_to_cpu(rc_sq_wqe->msg_len) + + wr->sg_list[i].length); - rc_sq_wqe->inv_key_immtdata = send_ieth(wr); + switch (wr->opcode) { + case IB_WR_SEND_WITH_IMM: + case IB_WR_RDMA_WRITE_WITH_IMM: + rc_sq_wqe->immtdata = wr->ex.imm_data; + break; + case IB_WR_SEND_WITH_INV: + rc_sq_wqe->inv_key = + cpu_to_le32(wr->ex.invalidate_rkey); + break; + default: + rc_sq_wqe->immtdata = 0; + break; + } roce_set_bit(rc_sq_wqe->byte_4, V2_RC_SEND_WQE_BYTE_4_FENCE_S, @@ -451,7 +476,7 @@ static int hns_roce_v2_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr, roce_set_field(sq_db.parameter, V2_DB_PARAMETER_SL_M, V2_DB_PARAMETER_SL_S, qp->sl); - hns_roce_write64_k((__be32 *)&sq_db, qp->sq.db_reg_l); + hns_roce_write64_k((__le32 *)&sq_db, qp->sq.db_reg_l); qp->sq_next_wqe = ind; qp->next_sge = sge_ind; @@ -513,7 +538,7 @@ static int hns_roce_v2_post_recv(struct ib_qp *ibqp, struct ib_recv_wr *wr, } if (i < hr_qp->rq.max_gs) { - dseg[i].lkey = cpu_to_be32(HNS_ROCE_INVALID_LKEY); + dseg[i].lkey = cpu_to_le32(HNS_ROCE_INVALID_LKEY); dseg[i].addr = 0; } @@ -546,7 +571,7 @@ static int hns_roce_v2_post_recv(struct ib_qp *ibqp, struct ib_recv_wr *wr, roce_set_field(rq_db.parameter, V2_DB_PARAMETER_CONS_IDX_M, V2_DB_PARAMETER_CONS_IDX_S, hr_qp->rq.head); - hns_roce_write64_k((__be32 *)&rq_db, hr_qp->rq.db_reg_l); + hns_roce_write64_k((__le32 *)&rq_db, hr_qp->rq.db_reg_l); } spin_unlock_irqrestore(&hr_qp->rq.lock, flags); diff --git a/drivers/infiniband/hw/hns/hns_roce_hw_v2.h b/drivers/infiniband/hw/hns/hns_roce_hw_v2.h index 960df09..2bf8a47 100644 --- a/drivers/infiniband/hw/hns/hns_roce_hw_v2.h +++ b/drivers/infiniband/hw/hns/hns_roce_hw_v2.h @@ -224,22 +224,22 @@ enum hns_roce_sgid_type { }; struct hns_roce_v2_cq_context { - u32 byte_4_pg_ceqn; - u32 byte_8_cqn; - u32 cqe_cur_blk_addr; - u32 byte_16_hop_addr; - u32 cqe_nxt_blk_addr; - u32 byte_24_pgsz_addr; - u32 byte_28_cq_pi; - u32 byte_32_cq_ci; - u32 cqe_ba; - u32 byte_40_cqe_ba; - u32 byte_44_db_record; - u32 db_record_addr; - u32 byte_52_cqe_cnt; - u32 byte_56_cqe_period_maxcnt; - u32 cqe_report_timer; - u32 byte_64_se_cqe_idx; + __le32 byte_4_pg_ceqn; + __le32 byte_8_cqn; + __le32 cqe_cur_blk_addr; + __le32 byte_16_hop_addr; + __le32 cqe_nxt_blk_addr; + __le32 byte_24_pgsz_addr; + __le32 byte_28_cq_pi; + __le32 byte_32_cq_ci; + __le32 cqe_ba; + __le32 byte_40_cqe_ba; + __le32 byte_44_db_record; + __le32 db_record_addr; + __le32 byte_52_cqe_cnt; + __le32 byte_56_cqe_period_maxcnt; + __le32 cqe_report_timer; + __le32 byte_64_se_cqe_idx; }; #define HNS_ROCE_V2_CQ_DEFAULT_BURST_NUM 0x0 #define HNS_ROCE_V2_CQ_DEFAULT_INTERVAL 0x0 @@ -328,66 +328,66 @@ enum hns_roce_v2_qp_state { }; struct hns_roce_v2_qp_context { - u32 byte_4_sqpn_tst; - u32 wqe_sge_ba; - u32 byte_12_sq_hop; - u32 byte_16_buf_ba_pg_sz; - u32 byte_20_smac_sgid_idx; - u32 byte_24_mtu_tc; - u32 byte_28_at_fl; + __le32 byte_4_sqpn_tst; + __le32 wqe_sge_ba; + __le32 byte_12_sq_hop; + __le32 byte_16_buf_ba_pg_sz; + __le32 byte_20_smac_sgid_idx; + __le32 byte_24_mtu_tc; + __le32 byte_28_at_fl; u8 dgid[GID_LEN_V2]; - u32 dmac; - u32 byte_52_udpspn_dmac; - u32 byte_56_dqpn_err; - u32 byte_60_qpst_mapid; - u32 qkey_xrcd; - u32 byte_68_rq_db; - u32 rq_db_record_addr; - u32 byte_76_srqn_op_en; - u32 byte_80_rnr_rx_cqn; - u32 byte_84_rq_ci_pi; - u32 rq_cur_blk_addr; - u32 byte_92_srq_info; - u32 byte_96_rx_reqmsn; - u32 rq_nxt_blk_addr; - u32 byte_104_rq_sge; - u32 byte_108_rx_reqepsn; - u32 rq_rnr_timer; - u32 rx_msg_len; - u32 rx_rkey_pkt_info; - u64 rx_va; - u32 byte_132_trrl; - u32 trrl_ba; - u32 byte_140_raq; - u32 byte_144_raq; - u32 byte_148_raq; - u32 byte_152_raq; - u32 byte_156_raq; - u32 byte_160_sq_ci_pi; - u32 sq_cur_blk_addr; - u32 byte_168_irrl_idx; - u32 byte_172_sq_psn; - u32 byte_176_msg_pktn; - u32 sq_cur_sge_blk_addr; - u32 byte_184_irrl_idx; - u32 cur_sge_offset; - u32 byte_192_ext_sge; - u32 byte_196_sq_psn; - u32 byte_200_sq_max; - u32 irrl_ba; - u32 byte_208_irrl; - u32 byte_212_lsn; - u32 sq_timer; - u32 byte_220_retry_psn_msn; - u32 byte_224_retry_msg; - u32 rx_sq_cur_blk_addr; - u32 byte_232_irrl_sge; - u32 irrl_cur_sge_offset; - u32 byte_240_irrl_tail; - u32 byte_244_rnr_rxack; - u32 byte_248_ack_psn; - u32 byte_252_err_txcqn; - u32 byte_256_sqflush_rqcqe; + __le32 dmac; + __le32 byte_52_udpspn_dmac; + __le32 byte_56_dqpn_err; + __le32 byte_60_qpst_mapid; + __le32 qkey_xrcd; + __le32 byte_68_rq_db; + __le32 rq_db_record_addr; + __le32 byte_76_srqn_op_en; + __le32 byte_80_rnr_rx_cqn; + __le32 byte_84_rq_ci_pi; + __le32 rq_cur_blk_addr; + __le32 byte_92_srq_info; + __le32 byte_96_rx_reqmsn; + __le32 rq_nxt_blk_addr; + __le32 byte_104_rq_sge; + __le32 byte_108_rx_reqepsn; + __le32 rq_rnr_timer; + __le32 rx_msg_len; + __le32 rx_rkey_pkt_info; + __le64 rx_va; + __le32 byte_132_trrl; + __le32 trrl_ba; + __le32 byte_140_raq; + __le32 byte_144_raq; + __le32 byte_148_raq; + __le32 byte_152_raq; + __le32 byte_156_raq; + __le32 byte_160_sq_ci_pi; + __le32 sq_cur_blk_addr; + __le32 byte_168_irrl_idx; + __le32 byte_172_sq_psn; + __le32 byte_176_msg_pktn; + __le32 sq_cur_sge_blk_addr; + __le32 byte_184_irrl_idx; + __le32 cur_sge_offset; + __le32 byte_192_ext_sge; + __le32 byte_196_sq_psn; + __le32 byte_200_sq_max; + __le32 irrl_ba; + __le32 byte_208_irrl; + __le32 byte_212_lsn; + __le32 sq_timer; + __le32 byte_220_retry_psn_msn; + __le32 byte_224_retry_msg; + __le32 rx_sq_cur_blk_addr; + __le32 byte_232_irrl_sge; + __le32 irrl_cur_sge_offset; + __le32 byte_240_irrl_tail; + __le32 byte_244_rnr_rxack; + __le32 byte_248_ack_psn; + __le32 byte_252_err_txcqn; + __le32 byte_256_sqflush_rqcqe; }; #define V2_QPC_BYTE_4_TST_S 0 @@ -761,17 +761,17 @@ struct hns_roce_v2_qp_context { #define V2_QPC_BYTE_256_SQ_FLUSH_IDX_M GENMASK(31, 16) struct hns_roce_v2_cqe { - u32 byte_4; + __le32 byte_4; union { __le32 rkey; __be32 immtdata; }; - u32 byte_12; - u32 byte_16; - u32 byte_cnt; + __le32 byte_12; + __le32 byte_16; + __le32 byte_cnt; u8 smac[4]; - u32 byte_28; - u32 byte_32; + __le32 byte_28; + __le32 byte_32; }; #define V2_CQE_BYTE_4_OPCODE_S 0 @@ -901,8 +901,8 @@ struct hns_roce_v2_mpt_entry { #define V2_DB_PARAMETER_SL_M GENMASK(18, 16) struct hns_roce_v2_cq_db { - u32 byte_4; - u32 parameter; + __le32 byte_4; + __le32 parameter; }; #define V2_CQ_DB_BYTE_4_TAG_S 0 @@ -920,18 +920,18 @@ struct hns_roce_v2_cq_db { #define V2_CQ_DB_PARAMETER_NOTIFY_S 24 struct hns_roce_v2_ud_send_wqe { - u32 byte_4; - u32 msg_len; - u32 immtdata; - u32 byte_16; - u32 byte_20; - u32 byte_24; - u32 qkey; - u32 byte_32; - u32 byte_36; - u32 byte_40; - u32 dmac; - u32 byte_48; + __le32 byte_4; + __le32 msg_len; + __be32 immtdata; + __le32 byte_16; + __le32 byte_20; + __le32 byte_24; + __le32 qkey; + __le32 byte_32; + __le32 byte_36; + __le32 byte_40; + __le32 dmac; + __le32 byte_48; u8 dgid[GID_LEN_V2]; }; @@ -1004,13 +1004,16 @@ struct hns_roce_v2_ud_send_wqe { #define V2_UD_SEND_WQE_BYTE_48_SMAC_INDX_M GENMASK(31, 24) struct hns_roce_v2_rc_send_wqe { - u32 byte_4; - u32 msg_len; - u32 inv_key_immtdata; - u32 byte_16; - u32 byte_20; - u32 rkey; - u64 va; + __le32 byte_4; + __le32 msg_len; + union { + __le32 inv_key; + __be32 immtdata; + }; + __le32 byte_16; + __le32 byte_20; + __le32 rkey; + __le64 va; }; #define V2_RC_SEND_WQE_BYTE_4_OPCODE_S 0 @@ -1038,14 +1041,14 @@ struct hns_roce_v2_rc_send_wqe { #define V2_RC_SEND_WQE_BYTE_20_MSG_START_SGE_IDX_M GENMASK(23, 0) struct hns_roce_v2_wqe_data_seg { - __be32 len; - __be32 lkey; - __be64 addr; + __le32 len; + __le32 lkey; + __le64 addr; }; struct hns_roce_v2_db { - u32 byte_4; - u32 parameter; + __le32 byte_4; + __le32 parameter; }; struct hns_roce_query_version { @@ -1105,12 +1108,12 @@ struct hns_roce_pf_res { #define PF_RES_DATA_5_PF_EQC_BT_NUM_M GENMASK(25, 16) struct hns_roce_vf_res_a { - u32 vf_id; - u32 vf_qpc_bt_idx_num; - u32 vf_srqc_bt_idx_num; - u32 vf_cqc_bt_idx_num; - u32 vf_mpt_bt_idx_num; - u32 vf_eqc_bt_idx_num; + __le32 vf_id; + __le32 vf_qpc_bt_idx_num; + __le32 vf_srqc_bt_idx_num; + __le32 vf_cqc_bt_idx_num; + __le32 vf_mpt_bt_idx_num; + __le32 vf_eqc_bt_idx_num; }; #define VF_RES_A_DATA_1_VF_QPC_BT_IDX_S 0 @@ -1144,11 +1147,11 @@ struct hns_roce_vf_res_a { #define VF_RES_A_DATA_5_VF_EQC_NUM_M GENMASK(25, 16) struct hns_roce_vf_res_b { - u32 rsv0; - u32 vf_smac_idx_num; - u32 vf_sgid_idx_num; - u32 vf_qid_idx_sl_num; - u32 rsv[2]; + __le32 rsv0; + __le32 vf_smac_idx_num; + __le32 vf_sgid_idx_num; + __le32 vf_qid_idx_sl_num; + __le32 rsv[2]; }; #define VF_RES_B_DATA_0_VF_ID_S 0 @@ -1180,11 +1183,11 @@ struct hns_roce_vf_res_b { #define ROCEE_VF_SGID_CFG4_SGID_TYPE_M GENMASK(1, 0) struct hns_roce_cfg_bt_attr { - u32 vf_qpc_cfg; - u32 vf_srqc_cfg; - u32 vf_cqc_cfg; - u32 vf_mpt_cfg; - u32 rsv[2]; + __le32 vf_qpc_cfg; + __le32 vf_srqc_cfg; + __le32 vf_cqc_cfg; + __le32 vf_mpt_cfg; + __le32 rsv[2]; }; #define CFG_BT_ATTR_DATA_0_VF_QPC_BA_PGSZ_S 0 @@ -1224,11 +1227,11 @@ struct hns_roce_cfg_bt_attr { #define CFG_BT_ATTR_DATA_3_VF_MPT_HOPNUM_M GENMASK(9, 8) struct hns_roce_cmq_desc { - u16 opcode; - u16 flag; - u16 retval; - u16 rsv; - u32 data[6]; + __le16 opcode; + __le16 flag; + __le16 retval; + __le16 rsv; + __le32 data[6]; }; #define HNS_ROCE_V2_GO_BIT_TIMEOUT_MSECS 10000 @@ -1274,18 +1277,18 @@ struct hns_roce_v2_priv { }; struct hns_roce_eq_context { - u32 byte_4; - u32 byte_8; - u32 byte_12; - u32 eqe_report_timer; - u32 eqe_ba0; - u32 eqe_ba1; - u32 byte_28; - u32 byte_32; - u32 byte_36; - u32 nxt_eqe_ba0; - u32 nxt_eqe_ba1; - u32 rsv[5]; + __le32 byte_4; + __le32 byte_8; + __le32 byte_12; + __le32 eqe_report_timer; + __le32 eqe_ba0; + __le32 eqe_ba1; + __le32 byte_28; + __le32 byte_32; + __le32 byte_36; + __le32 nxt_eqe_ba0; + __le32 nxt_eqe_ba1; + __le32 rsv[5]; }; #define HNS_ROCE_AEQ_DEFAULT_BURST_NUM 0x0 diff --git a/drivers/infiniband/hw/hns/hns_roce_main.c b/drivers/infiniband/hw/hns/hns_roce_main.c index aa0c242..830243e 100644 --- a/drivers/infiniband/hw/hns/hns_roce_main.c +++ b/drivers/infiniband/hw/hns/hns_roce_main.c @@ -200,7 +200,7 @@ static int hns_roce_query_device(struct ib_device *ib_dev, memset(props, 0, sizeof(*props)); - props->sys_image_guid = hr_dev->sys_image_guid; + props->sys_image_guid = cpu_to_be32(hr_dev->sys_image_guid); props->max_mr_size = (u64)(~(0ULL)); props->page_size_cap = hr_dev->caps.page_size_cap; props->vendor_id = hr_dev->vendor_id; diff --git a/drivers/infiniband/hw/hns/hns_roce_qp.c b/drivers/infiniband/hw/hns/hns_roce_qp.c index 4414cea..088973a 100644 --- a/drivers/infiniband/hw/hns/hns_roce_qp.c +++ b/drivers/infiniband/hw/hns/hns_roce_qp.c @@ -512,9 +512,9 @@ static int hns_roce_create_qp_common(struct hns_roce_dev *hr_dev, hr_qp->ibqp.qp_type = init_attr->qp_type; if (init_attr->sq_sig_type == IB_SIGNAL_ALL_WR) - hr_qp->sq_signal_bits = IB_SIGNAL_ALL_WR; + hr_qp->sq_signal_bits = cpu_to_le32(IB_SIGNAL_ALL_WR); else - hr_qp->sq_signal_bits = IB_SIGNAL_REQ_WR; + hr_qp->sq_signal_bits = cpu_to_le32(IB_SIGNAL_REQ_WR); ret = hns_roce_set_rq_size(hr_dev, &init_attr->cap, !!ib_pd->uobject, !!init_attr->srq, hr_qp); @@ -937,20 +937,6 @@ void hns_roce_unlock_cqs(struct hns_roce_cq *send_cq, } EXPORT_SYMBOL_GPL(hns_roce_unlock_cqs); -__be32 send_ieth(struct ib_send_wr *wr) -{ - switch (wr->opcode) { - case IB_WR_SEND_WITH_IMM: - case IB_WR_RDMA_WRITE_WITH_IMM: - return cpu_to_le32(wr->ex.imm_data); - case IB_WR_SEND_WITH_INV: - return cpu_to_le32(wr->ex.invalidate_rkey); - default: - return 0; - } -} -EXPORT_SYMBOL_GPL(send_ieth); - static void *get_wqe(struct hns_roce_qp *hr_qp, int offset) {

[for-next,1/4] RDMA/hns: Fix the endian problem for hns

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