| Message ID | 1526993237-51253-5-git-send-email-oulijun@huawei.com (mailing list archive) |
|---|---|
| State | Changes Requested |
| Headers | show |
On Tue, May 22, 2018 at 08:47:17PM +0800, Lijun Ou wrote: > In post send verb, The doorbell array is used for storing sq db temporarily > and the fields of sq db is __le32. As a result, the doorbell array should > be __le32. > > Signed-off-by: Lijun Ou <oulijun@huawei.com> > drivers/infiniband/hw/hns/hns_roce_device.h | 2 +- > drivers/infiniband/hw/hns/hns_roce_hw_v1.c | 6 +++--- > 2 files changed, 4 insertions(+), 4 deletions(-) > > diff --git a/drivers/infiniband/hw/hns/hns_roce_device.h b/drivers/infiniband/hw/hns/hns_roce_device.h > index fb305b7..3b34c50 100644 > +++ b/drivers/infiniband/hw/hns/hns_roce_device.h > @@ -850,7 +850,7 @@ static inline struct hns_roce_sqp *hr_to_hr_sqp(struct hns_roce_qp *hr_qp) > return container_of(hr_qp, struct hns_roce_sqp, hr_qp); > } > > -static inline void hns_roce_write64_k(__be32 val[2], void __iomem *dest) > +static inline void hns_roce_write64_k(__le32 val[2], void __iomem *dest) > { > __raw_writeq(*(u64 *) val, dest); > } This is nonsense. The driver needs to use writeq directly and not mangle le32/be32 like this. __raw_writeq is only for platform specific driver use. Register writes to PCI-E MMIO space should not have an endianness as writeq takes care of all required swapping from host -> PCI-E to give a consistent TLP on all platforms. So the correct thing is to make a u64 with the proper layout and pass that directly to writeq. eg probably writeq(((u64)le32_to_cpu(sq_db.u32_4) << 32) | le32_to_cpu(sq_db.u32_8)) Same general statements are true of the __raw_writel/readl I see... Please send a patch fixing all of this this properly. Jason -- To unsubscribe from this list: send the line "unsubscribe linux-rdma" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
diff --git a/drivers/infiniband/hw/hns/hns_roce_device.h b/drivers/infiniband/hw/hns/hns_roce_device.h index fb305b7..3b34c50 100644 --- a/drivers/infiniband/hw/hns/hns_roce_device.h +++ b/drivers/infiniband/hw/hns/hns_roce_device.h @@ -850,7 +850,7 @@ static inline struct hns_roce_sqp *hr_to_hr_sqp(struct hns_roce_qp *hr_qp) return container_of(hr_qp, struct hns_roce_sqp, hr_qp); } -static inline void hns_roce_write64_k(__be32 val[2], void __iomem *dest) +static inline void hns_roce_write64_k(__le32 val[2], void __iomem *dest) { __raw_writeq(*(u64 *) val, dest); } diff --git a/drivers/infiniband/hw/hns/hns_roce_hw_v1.c b/drivers/infiniband/hw/hns/hns_roce_hw_v1.c index 8013d69..97977a8 100644 --- a/drivers/infiniband/hw/hns/hns_roce_hw_v1.c +++ b/drivers/infiniband/hw/hns/hns_roce_hw_v1.c @@ -72,7 +72,7 @@ static int hns_roce_v1_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr, int ps_opcode = 0, i = 0; unsigned long flags = 0; void *wqe = NULL; - u32 doorbell[2]; + __le32 doorbell[2]; int nreq = 0; u32 ind = 0; int ret = 0; @@ -330,8 +330,8 @@ static int hns_roce_v1_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr, SQ_DOORBELL_U32_8_QPN_S, qp->doorbell_qpn); roce_set_bit(sq_db.u32_8, SQ_DOORBELL_HW_SYNC_S, 1); - doorbell[0] = le32_to_cpu(sq_db.u32_4); - doorbell[1] = le32_to_cpu(sq_db.u32_8); + doorbell[0] = sq_db.u32_4; + doorbell[1] = sq_db.u32_8; hns_roce_write64_k(doorbell, qp->sq.db_reg_l); qp->sq_next_wqe = ind;
In post send verb, The doorbell array is used for storing sq db temporarily and the fields of sq db is __le32. As a result, the doorbell array should be __le32. Signed-off-by: Lijun Ou <oulijun@huawei.com> --- drivers/infiniband/hw/hns/hns_roce_device.h | 2 +- drivers/infiniband/hw/hns/hns_roce_hw_v1.c | 6 +++--- 2 files changed, 4 insertions(+), 4 deletions(-)