From patchwork Sat Oct 27 07:15:23 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lijun Ou X-Patchwork-Id: 10658247 X-Patchwork-Delegate: jgg@ziepe.ca Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id BF95C5A4 for ; Sat, 27 Oct 2018 06:38:06 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id A7F8A2B858 for ; Sat, 27 Oct 2018 06:38:06 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 9C31E2BFA0; Sat, 27 Oct 2018 06:38:06 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 4DCFE2B858 for ; Sat, 27 Oct 2018 06:38:05 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727764AbeJ0PR7 (ORCPT ); Sat, 27 Oct 2018 11:17:59 -0400 Received: from szxga07-in.huawei.com ([45.249.212.35]:42726 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1728128AbeJ0PR7 (ORCPT ); Sat, 27 Oct 2018 11:17:59 -0400 Received: from DGGEMS405-HUB.china.huawei.com (unknown [172.30.72.60]) by Forcepoint Email with ESMTP id CE37B18DF2AC2; Sat, 27 Oct 2018 14:37:55 +0800 (CST) Received: from linux-ioko.site (10.71.200.31) by DGGEMS405-HUB.china.huawei.com (10.3.19.205) with Microsoft SMTP Server id 14.3.408.0; Sat, 27 Oct 2018 14:37:51 +0800 From: Lijun Ou To: , CC: , Subject: [PATCH for-next 09/10] RDMA/hns: Use the macro instead of qp state transition support Date: Sat, 27 Oct 2018 15:15:23 +0800 Message-ID: <1540624524-118822-10-git-send-email-oulijun@huawei.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1540624524-118822-1-git-send-email-oulijun@huawei.com> References: <1540624524-118822-1-git-send-email-oulijun@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.71.200.31] X-CFilter-Loop: Reflected Sender: linux-rdma-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-rdma@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch refactors the code of implementing qp state transition. Signed-off-by: Lijun Ou --- drivers/infiniband/hw/hns/hns_roce_hw_v2.c | 16 +--------------- drivers/infiniband/hw/hns/hns_roce_hw_v2.h | 19 +++++++++++++++++++ 2 files changed, 20 insertions(+), 15 deletions(-) diff --git a/drivers/infiniband/hw/hns/hns_roce_hw_v2.c b/drivers/infiniband/hw/hns/hns_roce_hw_v2.c index e95b947..45ba108 100644 --- a/drivers/infiniband/hw/hns/hns_roce_hw_v2.c +++ b/drivers/infiniband/hw/hns/hns_roce_hw_v2.c @@ -3844,21 +3844,7 @@ static int hns_roce_v2_modify_qp(struct ib_qp *ibqp, qpc_mask); if (ret) goto out; - } else if ((cur_state == IB_QPS_RTS && new_state == IB_QPS_RTS) || - (cur_state == IB_QPS_SQE && new_state == IB_QPS_RTS) || - (cur_state == IB_QPS_RTS && new_state == IB_QPS_SQD) || - (cur_state == IB_QPS_SQD && new_state == IB_QPS_SQD) || - (cur_state == IB_QPS_SQD && new_state == IB_QPS_RTS) || - (cur_state == IB_QPS_INIT && new_state == IB_QPS_RESET) || - (cur_state == IB_QPS_RTR && new_state == IB_QPS_RESET) || - (cur_state == IB_QPS_RTS && new_state == IB_QPS_RESET) || - (cur_state == IB_QPS_ERR && new_state == IB_QPS_RESET) || - (cur_state == IB_QPS_INIT && new_state == IB_QPS_ERR) || - (cur_state == IB_QPS_RTR && new_state == IB_QPS_ERR) || - (cur_state == IB_QPS_RTS && new_state == IB_QPS_ERR) || - (cur_state == IB_QPS_SQD && new_state == IB_QPS_ERR) || - (cur_state == IB_QPS_SQE && new_state == IB_QPS_ERR) || - (cur_state == IB_QPS_ERR && new_state == IB_QPS_ERR)) { + } else if (V2_QP_SUPPORT_STATE(cur_state, new_state)) { /* Nothing */ ; } else { diff --git a/drivers/infiniband/hw/hns/hns_roce_hw_v2.h b/drivers/infiniband/hw/hns/hns_roce_hw_v2.h index e6e3d8fb..7b308ac 100644 --- a/drivers/infiniband/hw/hns/hns_roce_hw_v2.h +++ b/drivers/infiniband/hw/hns/hns_roce_hw_v2.h @@ -133,6 +133,25 @@ (step_idx == 1 && hop_num == 1) || \ (step_idx == 2 && hop_num == 2)) +#define V2_QP_SUPPORT_STATE(cur_state, new_state) \ + ((cur_state == IB_QPS_RTS && new_state == IB_QPS_RTS) || \ + (cur_state == IB_QPS_SQE && new_state == IB_QPS_RTS) || \ + (cur_state == IB_QPS_RTS && new_state == IB_QPS_SQD) || \ + (cur_state == IB_QPS_SQD && new_state == IB_QPS_SQD) || \ + (cur_state == IB_QPS_SQD && new_state == IB_QPS_RTS) || \ + (cur_state == IB_QPS_INIT && new_state == IB_QPS_RESET) || \ + (cur_state == IB_QPS_RTR && new_state == IB_QPS_RESET) || \ + (cur_state == IB_QPS_RTS && new_state == IB_QPS_RESET) || \ + (cur_state == IB_QPS_ERR && new_state == IB_QPS_RESET) || \ + (cur_state == IB_QPS_SQD && new_state == IB_QPS_RESET) || \ + (cur_state == IB_QPS_SQE && new_state == IB_QPS_RESET) || \ + (cur_state == IB_QPS_INIT && new_state == IB_QPS_ERR) || \ + (cur_state == IB_QPS_RTR && new_state == IB_QPS_ERR) || \ + (cur_state == IB_QPS_RTS && new_state == IB_QPS_ERR) || \ + (cur_state == IB_QPS_SQD && new_state == IB_QPS_ERR) || \ + (cur_state == IB_QPS_SQE && new_state == IB_QPS_ERR) || \ + (cur_state == IB_QPS_ERR && new_state == IB_QPS_ERR)) + #define CMD_CSQ_DESC_NUM 1024 #define CMD_CRQ_DESC_NUM 1024