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Mon, 10 Mar 2025 15:02:56 -0700 Received: from vdi.nvidia.com (10.127.8.10) by mail.nvidia.com (10.126.190.181) with Microsoft SMTP Server id 15.2.1544.14 via Frontend Transport; Mon, 10 Mar 2025 15:02:53 -0700 From: Tariq Toukan To: "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Andrew Lunn CC: Gal Pressman , Mark Bloch , "Moshe Shemesh" , Saeed Mahameed , "Leon Romanovsky" , Tariq Toukan , , , , Shay Drory Subject: [PATCH net 4/6] net/mlx5: Lag, Check shared fdb before creating MultiPort E-Switch Date: Tue, 11 Mar 2025 00:01:42 +0200 Message-ID: <1741644104-97767-5-git-send-email-tariqt@nvidia.com> X-Mailer: git-send-email 2.8.0 In-Reply-To: <1741644104-97767-1-git-send-email-tariqt@nvidia.com> References: <1741644104-97767-1-git-send-email-tariqt@nvidia.com> Precedence: bulk X-Mailing-List: linux-rdma@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-NV-OnPremToCloud: AnonymousSubmission X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SN1PEPF0002636B:EE_|IA1PR12MB6234:EE_ X-MS-Office365-Filtering-Correlation-Id: b7e83fc7-6465-46a8-f015-08dd601f5440 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|36860700013|376014|82310400026; X-Microsoft-Antispam-Message-Info: 6gSXpu7oKf+jz/oN/+k/NU5fQpu6Y4ZGA0WOVtYyTInAUsis8hwB9hQUbnFTpObaHN8/APW4LnrFduTr015vQsMs3+ixKLKK5mdI+k/Bz4uSEkZvSweuinKkOKRfjanoP9CwPfnijpUjaZr6zWu/e+e7kp2RxflV+X41zGdWsVq0uv8v5T64WwZfbeBSTgOH2yOIqtSixBrkZRiKlI5y1B/X/3KAS8UeTyh2HqK5NEsHGjUvdanmEx7G+UnrSsJbjlHT+lldVnFAaoqm6OLXmj5s6XIT338ITvi5iDdX1uVV3iBvl05xAgauzikNLKerapQeCphBkIEUFHhPp5H0mpZlMiwpJtj9IrW9M509/RfdAu1KftGcwoQ347mXsoN0cXWR0weSAWUDIoRr60hg1S5TerksguzO+hfW500PEZjYeuc3R8Pm0nVBX1xFN6eIa9/1PFoBa7Sb1vEClulk47x+EpkqmDy3oIWsVZk5PihHvTgglHcKvIIYQt7kbyEug+c7dXlfj7vyUv8EPsduO+Oppcyb2flbzDcaHF5nRmAZ6O8rLLAtxJ+SnJHilsNNxQRBmgVlKykHtoCuGpb+zAcyQYMkLuHXl2E8JfCUphS9LVzQ/eU6JcKUn0eMX5EYKNPMVvge+XZQrqEGCHZw114sv4yq7op7lcJQm636akVD4Ry46FOBZCU6xXNSr059vidQoeDLq5lMkyVbEUNTZoFavu7MFfnw2egXBEdoyyVzI6odt55V6Sna6Ohwokovb2WG8oXM0UFhHA0vpSahT7t7sOqQ6Ak9gObMsaUP2voXMIfvB35jZEE+l01HZpY7hAFHWMd4QZUWhQnCuQnmpID/YPhPM6HuZOJMJs17LMD9qrRw7wQ0/nk36ksn0xuz8L64R7gkHdwh8UqG8GGONZSRsgsCDzoeOXG8cjbWsVvH5+dhOInOBlBl6IaE+OK1Vq/UZIFMyzhEPFg065gDGpoFCRLKVOiPxUTiCqa7tXoSX0XogXTBc4014zW+pP4XG77kxxCx1idxXS2BjGGfxSUOWZyGiDJArPS9j3ta0w/IC0KaOflDrSFUEUhzo3d+gYcCNqII/cVishpKavnEHoBz+Gb6zW+1kvs8humDWYxYr4Ju8B2vXN6UH0yWQIeQTAz9Qls35HC9nGzfOr4zQskJSgI67G7AwbP9MrDT3lefiwmcLzmt759Omvzgdsq/2fI+3tWARtd28dvFOblogzULg/AvQUa0jwK/r5/7tX7M2Ib9R56HQ74/Z0aQ/vZyYRi/nmhxsV34/n2QQE5ioHcK3NSpyRSbHVg3pT5+h3zOCozCHsr5oGAs218eZKOniGDI/nJ7W5FQZEko+x2APb1MWndLAOKjU/+KOjX1j4188GPCKRTNawzOZY5k2LPkNuam3QwSFn6P8SkufI5yqhyYbt0hh/mYXxqeiV2h7usp0E0XYFj3smfhFFZpOqg5y/NelpUlXaC7VeXXe83z40bB+8enSb76IQZFEoAzr30= X-Forefront-Antispam-Report: CIP:216.228.118.232;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc7edge1.nvidia.com;CAT:NONE;SFS:(13230040)(1800799024)(36860700013)(376014)(82310400026);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 10 Mar 2025 22:03:02.9335 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: b7e83fc7-6465-46a8-f015-08dd601f5440 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.118.232];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: SN1PEPF0002636B.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA1PR12MB6234 From: Shay Drory Currently, MultiPort E-Switch is requesting to create a LAG with shared FDB without checking the LAG is supporting shared FDB. Add the check. Fixes: a32327a3a02c ("net/mlx5: Lag, Control MultiPort E-Switch single FDB mode") Signed-off-by: Shay Drory Reviewed-by: Mark Bloch Signed-off-by: Tariq Toukan Reviewed-by: Michal Swiatkowski --- drivers/net/ethernet/mellanox/mlx5/core/lag/lag.c | 4 ++-- drivers/net/ethernet/mellanox/mlx5/core/lag/lag.h | 1 + drivers/net/ethernet/mellanox/mlx5/core/lag/mpesw.c | 3 ++- 3 files changed, 5 insertions(+), 3 deletions(-) diff --git a/drivers/net/ethernet/mellanox/mlx5/core/lag/lag.c b/drivers/net/ethernet/mellanox/mlx5/core/lag/lag.c index cea5aa314f6c..ed2ba272946b 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/lag/lag.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/lag/lag.c @@ -951,7 +951,7 @@ void mlx5_disable_lag(struct mlx5_lag *ldev) mlx5_eswitch_reload_ib_reps(ldev->pf[i].dev->priv.eswitch); } -static bool mlx5_shared_fdb_supported(struct mlx5_lag *ldev) +bool mlx5_lag_shared_fdb_supported(struct mlx5_lag *ldev) { int idx = mlx5_lag_get_dev_index_by_seq(ldev, MLX5_LAG_P1); struct mlx5_core_dev *dev; @@ -1038,7 +1038,7 @@ static void mlx5_do_bond(struct mlx5_lag *ldev) } if (do_bond && !__mlx5_lag_is_active(ldev)) { - bool shared_fdb = mlx5_shared_fdb_supported(ldev); + bool shared_fdb = mlx5_lag_shared_fdb_supported(ldev); roce_lag = mlx5_lag_is_roce_lag(ldev); diff --git a/drivers/net/ethernet/mellanox/mlx5/core/lag/lag.h b/drivers/net/ethernet/mellanox/mlx5/core/lag/lag.h index 01cf72366947..c2f256bb2bc2 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/lag/lag.h +++ b/drivers/net/ethernet/mellanox/mlx5/core/lag/lag.h @@ -92,6 +92,7 @@ mlx5_lag_is_ready(struct mlx5_lag *ldev) return test_bit(MLX5_LAG_FLAG_NDEVS_READY, &ldev->state_flags); } +bool mlx5_lag_shared_fdb_supported(struct mlx5_lag *ldev); bool mlx5_lag_check_prereq(struct mlx5_lag *ldev); void mlx5_modify_lag(struct mlx5_lag *ldev, struct lag_tracker *tracker); diff --git a/drivers/net/ethernet/mellanox/mlx5/core/lag/mpesw.c b/drivers/net/ethernet/mellanox/mlx5/core/lag/mpesw.c index ffac0bd6c895..1770297a112e 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/lag/mpesw.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/lag/mpesw.c @@ -83,7 +83,8 @@ static int enable_mpesw(struct mlx5_lag *ldev) if (mlx5_eswitch_mode(dev0) != MLX5_ESWITCH_OFFLOADS || !MLX5_CAP_PORT_SELECTION(dev0, port_select_flow_table) || !MLX5_CAP_GEN(dev0, create_lag_when_not_master_up) || - !mlx5_lag_check_prereq(ldev)) + !mlx5_lag_check_prereq(ldev) || + !mlx5_lag_shared_fdb_supported(ldev)) return -EOPNOTSUPP; err = mlx5_mpesw_metadata_set(ldev);