From patchwork Tue Jan 12 12:09:02 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vladimir Sokolovsky X-Patchwork-Id: 72357 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter.kernel.org (8.14.3/8.14.2) with ESMTP id o0CC97oL005464 for ; Tue, 12 Jan 2010 12:09:07 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751209Ab0ALMJG (ORCPT ); Tue, 12 Jan 2010 07:09:06 -0500 Received: (majordomo@vger.kernel.org) by vger.kernel.org id S1751233Ab0ALMJG (ORCPT ); Tue, 12 Jan 2010 07:09:06 -0500 Received: from mail.mellanox.co.il ([194.90.237.43]:33207 "EHLO mellanox.co.il" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1751209Ab0ALMJF (ORCPT ); Tue, 12 Jan 2010 07:09:05 -0500 Received: from Internal Mail-Server by MTLPINE1 (envelope-from vlad@mellanox.co.il) with SMTP; 12 Jan 2010 14:09:00 +0200 Received: from localhost ([10.0.18.24]) by mtlexch01.mtl.com with Microsoft SMTPSVC(6.0.3790.3959); Tue, 12 Jan 2010 14:09:00 +0200 Date: Tue, 12 Jan 2010 14:09:02 +0200 From: Vladimir Sokolovsky To: rdreier@cisco.com Cc: linux-rdma@vger.kernel.org Subject: [PATCH] mlx4/IB: Add set_4k_mtu module parameter. Message-ID: <20100112120901.GA7161@vlad-laptop> Reply-To: vlad@dev.mellanox.co.il MIME-Version: 1.0 Content-Disposition: inline User-Agent: Mutt/1.5.17+20080114 (2008-01-14) X-OriginalArrivalTime: 12 Jan 2010 12:09:00.0571 (UTC) FILETIME=[0662B6B0:01CA9380] X-TM-AS-Product-Ver: SMEX-8.0.0.1181-6.000.1038-17126.007 X-TM-AS-Result: No--5.695300-8.000000-31 X-TM-AS-User-Approved-Sender: No X-TM-AS-User-Blocked-Sender: No Sender: linux-rdma-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-rdma@vger.kernel.org diff --git a/drivers/net/mlx4/port.c b/drivers/net/mlx4/port.c index 606aa58..0e9d745 100644 --- a/drivers/net/mlx4/port.c +++ b/drivers/net/mlx4/port.c @@ -37,6 +37,10 @@ #include "mlx4.h" +static int mlx4_ib_set_4k_mtu; +module_param_named(set_4k_mtu, mlx4_ib_set_4k_mtu, int, 0444); +MODULE_PARM_DESC(set_4k_mtu, "attempt to set 4K MTU to all ConnectX ports"); + #define MLX4_MAC_VALID (1ull << 63) #define MLX4_MAC_MASK 0xffffffffffffULL @@ -308,6 +312,12 @@ int mlx4_SET_PORT(struct mlx4_dev *dev, u8 port) memset(mailbox->buf, 0, 256); + if (mlx4_ib_set_4k_mtu) + ((__be32 *) mailbox->buf)[0] |= cpu_to_be32((1 << 22) | + (1 << 21) | + (5 << 12) | + (2 << 4)); + ((__be32 *) mailbox->buf)[1] = dev->caps.ib_port_def_cap[port]; err = mlx4_cmd(dev, mailbox->dma, port, 0, MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B);