@@ -52,6 +52,7 @@
#include <rdma/iw_cm.h>
#include <rdma/iw_portmap.h>
#include <rdma/rdma_netlink.h>
+#include <crypto/hash.h>
#include "i40iw_status.h"
#include "i40iw_osdep.h"
@@ -39,6 +39,7 @@
#include <linux/string.h>
#include <linux/bitops.h>
#include <net/tcp.h>
+#include <crypto/hash.h>
/* get readq/writeq support for 32 bit kernels, use the low-first version */
#include <linux/io-64-nonatomic-lo-hi.h>
@@ -171,12 +172,12 @@ struct i40iw_hw;
u8 __iomem *i40iw_get_hw_addr(void *dev);
void i40iw_ieq_mpa_crc_ae(struct i40iw_sc_dev *dev, struct i40iw_sc_qp *qp);
enum i40iw_status_code i40iw_vf_wait_vchnl_resp(struct i40iw_sc_dev *dev);
-enum i40iw_status_code i40iw_ieq_check_mpacrc(struct hash_desc *desc, void *addr,
+enum i40iw_status_code i40iw_ieq_check_mpacrc(struct shash_desc *desc, void *addr,
u32 length, u32 value);
struct i40iw_sc_qp *i40iw_ieq_get_qp(struct i40iw_sc_dev *dev, struct i40iw_puda_buf *buf);
void i40iw_ieq_update_tcpip_info(struct i40iw_puda_buf *buf, u16 length, u32 seqnum);
-void i40iw_free_hash_desc(struct hash_desc *);
-enum i40iw_status_code i40iw_init_hash_desc(struct hash_desc *);
+void i40iw_free_hash_desc(struct shash_desc *);
+enum i40iw_status_code i40iw_init_hash_desc(struct shash_desc **);
enum i40iw_status_code i40iw_puda_get_tcpip_info(struct i40iw_puda_completion_info *info,
struct i40iw_puda_buf *buf);
enum i40iw_status_code i40iw_cqp_sds_cmd(struct i40iw_sc_dev *dev,
@@ -729,7 +729,7 @@ void i40iw_puda_dele_resources(struct i40iw_sc_dev *dev,
switch (rsrc->completion) {
case PUDA_HASH_CRC_COMPLETE:
- i40iw_free_hash_desc(&rsrc->hash_desc);
+ i40iw_free_hash_desc(rsrc->hash_desc);
case PUDA_QP_CREATED:
do {
if (reset)
@@ -1142,7 +1142,7 @@ static enum i40iw_status_code i40iw_ieq_handle_partial(struct i40iw_puda_rsrc *i
crcptr = txbuf->data + fpdu_len - 4;
mpacrc = *(u32 *)crcptr;
if (ieq->check_crc) {
- status = i40iw_ieq_check_mpacrc(&ieq->hash_desc, txbuf->data,
+ status = i40iw_ieq_check_mpacrc(ieq->hash_desc, txbuf->data,
(fpdu_len - 4), mpacrc);
if (status) {
i40iw_debug(ieq->dev, I40IW_DEBUG_IEQ,
@@ -1210,7 +1210,7 @@ static enum i40iw_status_code i40iw_ieq_process_buf(struct i40iw_puda_rsrc *ieq,
crcptr = datap + fpdu_len - 4;
mpacrc = *(u32 *)crcptr;
if (ieq->check_crc)
- ret = i40iw_ieq_check_mpacrc(&ieq->hash_desc,
+ ret = i40iw_ieq_check_mpacrc(ieq->hash_desc,
datap, fpdu_len - 4, mpacrc);
if (ret) {
status = I40IW_ERR_MPA_CRC;
@@ -135,7 +135,7 @@ struct i40iw_puda_rsrc {
u32 rxq_invalid_cnt;
u32 tx_wqe_avail_cnt;
bool check_crc;
- struct hash_desc hash_desc;
+ struct shash_desc *hash_desc;
struct list_head txpend;
struct list_head bufpool; /* free buffers pool list for recv and xmit */
u32 alloc_buf_count;
@@ -173,11 +173,11 @@ struct i40iw_sc_qp *i40iw_ieq_get_qp(struct i40iw_sc_dev *dev,
struct i40iw_puda_buf *buf);
enum i40iw_status_code i40iw_puda_get_tcpip_info(struct i40iw_puda_completion_info *info,
struct i40iw_puda_buf *buf);
-enum i40iw_status_code i40iw_ieq_check_mpacrc(struct hash_desc *desc,
+enum i40iw_status_code i40iw_ieq_check_mpacrc(struct shash_desc *desc,
void *addr, u32 length, u32 value);
-enum i40iw_status_code i40iw_init_hash_desc(struct hash_desc *desc);
+enum i40iw_status_code i40iw_init_hash_desc(struct shash_desc **desc);
void i40iw_ieq_mpa_crc_ae(struct i40iw_sc_dev *dev, struct i40iw_sc_qp *qp);
-void i40iw_free_hash_desc(struct hash_desc *desc);
+void i40iw_free_hash_desc(struct shash_desc *desc);
void i40iw_ieq_update_tcpip_info(struct i40iw_puda_buf *buf, u16 length,
u32 seqnum);
#endif
@@ -1024,11 +1024,24 @@ void i40iw_ieq_mpa_crc_ae(struct i40iw_sc_dev *dev, struct i40iw_sc_qp *qp)
* i40iw_init_hash_desc - initialize hash for crc calculation
* @desc: cryption type
*/
-enum i40iw_status_code i40iw_init_hash_desc(struct hash_desc *desc)
+enum i40iw_status_code i40iw_init_hash_desc(struct shash_desc **desc)
{
- desc->tfm = crypto_alloc_hash("crc32c", 0, CRYPTO_ALG_ASYNC);
- if (IS_ERR(desc->tfm))
+ struct crypto_shash *tfm;
+ struct shash_desc *tdesc;
+
+ tfm = crypto_alloc_shash("crc32c", 0, 0);
+ if (IS_ERR(tfm))
+ return I40IW_ERR_MPA_CRC;
+
+ tdesc = kzalloc(sizeof(*tdesc) + crypto_shash_descsize(tfm),
+ GFP_KERNEL);
+ if (!tdesc) {
+ crypto_free_shash(tfm);
return I40IW_ERR_MPA_CRC;
+ }
+ tdesc->tfm = tfm;
+ *desc = tdesc;
+
return 0;
}
@@ -1036,9 +1049,12 @@ enum i40iw_status_code i40iw_init_hash_desc(struct hash_desc *desc)
* i40iw_free_hash_desc - free hash desc
* @desc: to be freed
*/
-void i40iw_free_hash_desc(struct hash_desc *desc)
+void i40iw_free_hash_desc(struct shash_desc *desc)
{
- crypto_free_hash(desc->tfm);
+ if (desc) {
+ crypto_free_shash(desc->tfm);
+ kfree(desc);
+ }
}
/**
@@ -1065,21 +1081,19 @@ enum i40iw_status_code i40iw_alloc_query_fpm_buf(struct i40iw_sc_dev *dev,
* @length: length of buffer
* @value: value to be compared
*/
-enum i40iw_status_code i40iw_ieq_check_mpacrc(struct hash_desc *desc,
+enum i40iw_status_code i40iw_ieq_check_mpacrc(struct shash_desc *desc,
void *addr,
u32 length,
u32 value)
{
- struct scatterlist sg;
u32 crc = 0;
int ret;
enum i40iw_status_code ret_code = 0;
- crypto_hash_init(desc);
- sg_init_one(&sg, addr, length);
- ret = crypto_hash_update(desc, &sg, length);
+ crypto_shash_init(desc);
+ ret = crypto_shash_update(desc, addr, length);
if (!ret)
- crypto_hash_final(desc, (u8 *)&crc);
+ crypto_shash_final(desc, (u8 *)&crc);
if (crc != value) {
i40iw_pr_err("mpa crc check fail\n");
ret_code = I40IW_ERR_MPA_CRC;