[net-next,16/19] net/mlx5: Implement dma ops and params for mediated device

Message ID	20191107160834.21087-16-parav@mellanox.com (mailing list archive)
State	Not Applicable
Headers	show Return-Path: <SRS0=yP1V=Y7=vger.kernel.org=linux-rdma-owner@kernel.org> From: Parav Pandit <parav@mellanox.com> To: alex.williamson@redhat.com, davem@davemloft.net, kvm@vger.kernel.org, netdev@vger.kernel.org Cc: saeedm@mellanox.com, kwankhede@nvidia.com, leon@kernel.org, cohuck@redhat.com, jiri@mellanox.com, linux-rdma@vger.kernel.org, Parav Pandit <parav@mellanox.com> Subject: [PATCH net-next 16/19] net/mlx5: Implement dma ops and params for mediated device Date: Thu, 7 Nov 2019 10:08:31 -0600 Message-Id: <20191107160834.21087-16-parav@mellanox.com> In-Reply-To: <20191107160834.21087-1-parav@mellanox.com> References: <20191107160448.20962-1-parav@mellanox.com> <20191107160834.21087-1-parav@mellanox.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: linux-rdma-owner@vger.kernel.org Precedence: bulk
Series	Mellanox, mlx5 sub function support \| expand [net-next,00/19] Mellanox, mlx5 sub function support [net-next,01/19] net/mlx5: E-switch, Move devlink port close to eswitch port [net-next,02/19] net/mlx5: E-Switch, Add SF vport, vport-rep support [net-next,03/19] net/mlx5: Introduce SF table framework [net-next,04/19] net/mlx5: Introduce SF life cycle APIs to allocate/free [net-next,05/19] net/mlx5: E-Switch, Enable/disable SF's vport during SF life cycle [net-next,06/19] net/mlx5: Add support for mediated devices in switchdev mode [net-next,07/19] vfio/mdev: Introduce sha1 based mdev alias [net-next,08/19] vfio/mdev: Make mdev alias unique among all mdevs [net-next,09/19] vfio/mdev: Expose mdev alias in sysfs tree [net-next,10/19] vfio/mdev: Introduce an API mdev_alias [net-next,11/19] vfio/mdev: Improvise mdev life cycle and parent removal scheme [net-next,12/19] devlink: Introduce mdev port flavour [net-next,13/19] net/mlx5: Register SF devlink port [net-next,14/19] net/mlx5: Share irqs between SFs and parent PCI device [net-next,15/19] net/mlx5: Add load/unload routines for SF driver binding [net-next,16/19] net/mlx5: Implement dma ops and params for mediated device [net-next,17/19] net/mlx5: Add mdev driver to bind to mdev devices [net-next,18/19] Documentation: net: mlx5: Add mdev usage documentation [net-next,19/19] mtty: Optionally support mtty alias

diff --git a/drivers/net/ethernet/mellanox/mlx5/core/meddev/sf.c b/drivers/net/ethernet/mellanox/mlx5/core/meddev/sf.c index cfbbb2d32aca..4b0718418bc5 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/meddev/sf.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/meddev/sf.c @@ -207,6 +207,156 @@ u16 mlx5_core_max_sfs(const struct mlx5_core_dev *dev, return mlx5_core_is_sf_supported(dev) ? sf_table->max_sfs : 0; } +static void *mlx5_sf_dma_alloc(struct device *dev, size_t size, + dma_addr_t *dma_handle, gfp_t gfp, + unsigned long attrs) +{ + return dma_alloc_attrs(dev->parent, size, dma_handle, gfp, attrs); +} + +static void +mlx5_sf_dma_free(struct device *dev, size_t size, + void *vaddr, dma_addr_t dma_handle, + unsigned long attrs) +{ + dma_free_attrs(dev->parent, size, vaddr, dma_handle, attrs); +} + +static int +mlx5_sf_dma_mmap(struct device *dev, struct vm_area_struct *vma, + void *cpu_addr, dma_addr_t dma_addr, size_t size, + unsigned long attrs) +{ + return dma_mmap_attrs(dev->parent, vma, cpu_addr, + dma_addr, size, attrs); +} + +static int +mlx5_sf_dma_get_sgtable(struct device *dev, struct sg_table *sgt, + void *cpu_addr, dma_addr_t dma_addr, size_t size, + unsigned long attrs) +{ + return dma_get_sgtable_attrs(dev->parent, sgt, cpu_addr, + dma_addr, size, attrs); +} + +static dma_addr_t +mlx5_sf_dma_map_page(struct device *dev, struct page *page, + unsigned long offset, size_t size, + enum dma_data_direction dir, + unsigned long attrs) +{ + return dma_map_page_attrs(dev->parent, page, offset, size, dir, attrs); +} + +static void +mlx5_sf_dma_unmap_page(struct device *dev, dma_addr_t dma_handle, + size_t size, enum dma_data_direction dir, + unsigned long attrs) +{ + dma_unmap_page_attrs(dev->parent, dma_handle, size, dir, attrs); +} + +static int +mlx5_sf_dma_map_sg(struct device *dev, struct scatterlist *sg, + int nents, enum dma_data_direction dir, + unsigned long attrs) +{ + return dma_map_sg_attrs(dev->parent, sg, nents, dir, attrs); +} + +static void +mlx5_sf_dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nents, + enum dma_data_direction dir, unsigned long attrs) +{ + dma_unmap_sg_attrs(dev->parent, sg, nents, dir, attrs); +} + +static dma_addr_t +mlx5_sf_dma_map_resource(struct device *dev, phys_addr_t phys_addr, + size_t size, enum dma_data_direction dir, + unsigned long attrs) +{ + return dma_map_resource(dev->parent, phys_addr, size, dir, attrs); +} + +static void +mlx5_sf_dma_unmap_resource(struct device *dev, dma_addr_t dma_handle, + size_t size, enum dma_data_direction dir, + unsigned long attrs) +{ + dma_unmap_resource(dev->parent, dma_handle, size, dir, attrs); +} + +static void +mlx5_sf_dma_sync_single_for_cpu(struct device *dev, + dma_addr_t dma_handle, size_t size, + enum dma_data_direction dir) +{ + dma_sync_single_for_cpu(dev->parent, dma_handle, size, dir); +} + +static void +mlx5_sf_dma_sync_single_for_device(struct device *dev, + dma_addr_t dma_handle, size_t size, + enum dma_data_direction dir) +{ + dma_sync_single_for_device(dev->parent, dma_handle, size, dir); +} + +static void +mlx5_sf_dma_sync_sg_for_cpu(struct device *dev, + struct scatterlist *sg, int nents, + enum dma_data_direction dir) +{ + dma_sync_sg_for_cpu(dev->parent, sg, nents, dir); +} + +static void +mlx5_sf_dma_sync_sg_for_device(struct device *dev, + struct scatterlist *sg, int nents, + enum dma_data_direction dir) +{ + dma_sync_sg_for_device(dev->parent, sg, nents, dir); +} + +static void +mlx5_sf_dma_cache_sync(struct device *dev, void *vaddr, size_t size, + enum dma_data_direction dir) +{ + dma_cache_sync(dev->parent, vaddr, size, dir); +} + +static const struct dma_map_ops mlx5_sf_dma_ops = { + .alloc = mlx5_sf_dma_alloc, + .free = mlx5_sf_dma_free, + .mmap = mlx5_sf_dma_mmap, + .get_sgtable = mlx5_sf_dma_get_sgtable, + .map_page = mlx5_sf_dma_map_page, + .unmap_page = mlx5_sf_dma_unmap_page, + .map_sg = mlx5_sf_dma_map_sg, + .unmap_sg = mlx5_sf_dma_unmap_sg, + .map_resource = mlx5_sf_dma_map_resource, + .unmap_resource = mlx5_sf_dma_unmap_resource, + .sync_single_for_cpu = mlx5_sf_dma_sync_single_for_cpu, + .sync_sg_for_cpu = mlx5_sf_dma_sync_sg_for_cpu, + .sync_sg_for_device = mlx5_sf_dma_sync_sg_for_device, + .sync_single_for_device = mlx5_sf_dma_sync_single_for_device, + .cache_sync = mlx5_sf_dma_cache_sync, +}; + +static void +set_dma_params(struct device *dev, const struct mlx5_core_dev *coredev) +{ + struct pci_dev *pdev = coredev->pdev; + + dev->dma_ops = &mlx5_sf_dma_ops; + dev->dma_mask = pdev->dev.dma_mask; + dev->dma_parms = pdev->dev.dma_parms; + dma_set_coherent_mask(dev, pdev->dev.coherent_dma_mask); + dma_set_max_seg_size(dev, dma_get_max_seg_size(&pdev->dev)); +} + int mlx5_sf_load(struct mlx5_sf *sf, struct device *device, const struct mlx5_core_dev *parent_dev) { @@ -231,6 +381,7 @@ int mlx5_sf_load(struct mlx5_sf *sf, struct device *device, err = -ENOMEM; goto remap_err; } + set_dma_params(dev->device, parent_dev); err = mlx5_mdev_init(dev, MLX5_DEFAULT_PROF); if (err) {

[net-next,16/19] net/mlx5: Implement dma ops and params for mediated device

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