@@ -70,22 +70,22 @@ static inline void set_data_seg_v2(struct hns_roce_v2_wqe_data_seg *dseg,
* defining the mapping, so that the validity can be identified by checking the
* mapped value is greater than 0.
*/
-#define HR_OPC_MAP(ib_key, hr_key) \
+#define HR_IB_OPC_MAP(ib_key, hr_key) \
[IB_WR_ ## ib_key] = 1 + HNS_ROCE_V2_WQE_OP_ ## hr_key
static const u32 hns_roce_op_code[] = {
- HR_OPC_MAP(RDMA_WRITE, RDMA_WRITE),
- HR_OPC_MAP(RDMA_WRITE_WITH_IMM, RDMA_WRITE_WITH_IMM),
- HR_OPC_MAP(SEND, SEND),
- HR_OPC_MAP(SEND_WITH_IMM, SEND_WITH_IMM),
- HR_OPC_MAP(RDMA_READ, RDMA_READ),
- HR_OPC_MAP(ATOMIC_CMP_AND_SWP, ATOM_CMP_AND_SWAP),
- HR_OPC_MAP(ATOMIC_FETCH_AND_ADD, ATOM_FETCH_AND_ADD),
- HR_OPC_MAP(SEND_WITH_INV, SEND_WITH_INV),
- HR_OPC_MAP(LOCAL_INV, LOCAL_INV),
- HR_OPC_MAP(MASKED_ATOMIC_CMP_AND_SWP, ATOM_MSK_CMP_AND_SWAP),
- HR_OPC_MAP(MASKED_ATOMIC_FETCH_AND_ADD, ATOM_MSK_FETCH_AND_ADD),
- HR_OPC_MAP(REG_MR, FAST_REG_PMR),
+ HR_IB_OPC_MAP(RDMA_WRITE, RDMA_WRITE),
+ HR_IB_OPC_MAP(RDMA_WRITE_WITH_IMM, RDMA_WRITE_WITH_IMM),
+ HR_IB_OPC_MAP(SEND, SEND),
+ HR_IB_OPC_MAP(SEND_WITH_IMM, SEND_WITH_IMM),
+ HR_IB_OPC_MAP(RDMA_READ, RDMA_READ),
+ HR_IB_OPC_MAP(ATOMIC_CMP_AND_SWP, ATOM_CMP_AND_SWAP),
+ HR_IB_OPC_MAP(ATOMIC_FETCH_AND_ADD, ATOM_FETCH_AND_ADD),
+ HR_IB_OPC_MAP(SEND_WITH_INV, SEND_WITH_INV),
+ HR_IB_OPC_MAP(LOCAL_INV, LOCAL_INV),
+ HR_IB_OPC_MAP(MASKED_ATOMIC_CMP_AND_SWP, ATOM_MSK_CMP_AND_SWAP),
+ HR_IB_OPC_MAP(MASKED_ATOMIC_FETCH_AND_ADD, ATOM_MSK_FETCH_AND_ADD),
+ HR_IB_OPC_MAP(REG_MR, FAST_REG_PMR),
};
static u32 to_hr_opcode(u32 ib_opcode)
@@ -3849,23 +3849,23 @@ static int get_cur_qp(struct hns_roce_cq *hr_cq, struct hns_roce_v2_cqe *cqe,
* value when defining the mapping, so that the validity can be identified by
* checking whether the mapped value is greater than 0.
*/
-#define HR_WC_OP_MAP(hr_key, ib_key) \
+#define HR_IB_WC_OP_MAP(hr_key, ib_key) \
[HNS_ROCE_V2_WQE_OP_ ## hr_key] = 1 + IB_WC_ ## ib_key
static const u32 wc_send_op_map[] = {
- HR_WC_OP_MAP(SEND, SEND),
- HR_WC_OP_MAP(SEND_WITH_INV, SEND),
- HR_WC_OP_MAP(SEND_WITH_IMM, SEND),
- HR_WC_OP_MAP(RDMA_READ, RDMA_READ),
- HR_WC_OP_MAP(RDMA_WRITE, RDMA_WRITE),
- HR_WC_OP_MAP(RDMA_WRITE_WITH_IMM, RDMA_WRITE),
- HR_WC_OP_MAP(LOCAL_INV, LOCAL_INV),
- HR_WC_OP_MAP(ATOM_CMP_AND_SWAP, COMP_SWAP),
- HR_WC_OP_MAP(ATOM_FETCH_AND_ADD, FETCH_ADD),
- HR_WC_OP_MAP(ATOM_MSK_CMP_AND_SWAP, MASKED_COMP_SWAP),
- HR_WC_OP_MAP(ATOM_MSK_FETCH_AND_ADD, MASKED_FETCH_ADD),
- HR_WC_OP_MAP(FAST_REG_PMR, REG_MR),
- HR_WC_OP_MAP(BIND_MW, REG_MR),
+ HR_IB_WC_OP_MAP(SEND, SEND),
+ HR_IB_WC_OP_MAP(SEND_WITH_INV, SEND),
+ HR_IB_WC_OP_MAP(SEND_WITH_IMM, SEND),
+ HR_IB_WC_OP_MAP(RDMA_READ, RDMA_READ),
+ HR_IB_WC_OP_MAP(RDMA_WRITE, RDMA_WRITE),
+ HR_IB_WC_OP_MAP(RDMA_WRITE_WITH_IMM, RDMA_WRITE),
+ HR_IB_WC_OP_MAP(LOCAL_INV, LOCAL_INV),
+ HR_IB_WC_OP_MAP(ATOM_CMP_AND_SWAP, COMP_SWAP),
+ HR_IB_WC_OP_MAP(ATOM_FETCH_AND_ADD, FETCH_ADD),
+ HR_IB_WC_OP_MAP(ATOM_MSK_CMP_AND_SWAP, MASKED_COMP_SWAP),
+ HR_IB_WC_OP_MAP(ATOM_MSK_FETCH_AND_ADD, MASKED_FETCH_ADD),
+ HR_IB_WC_OP_MAP(FAST_REG_PMR, REG_MR),
+ HR_IB_WC_OP_MAP(BIND_MW, REG_MR),
};
static int to_ib_wc_send_op(u32 hr_opcode)
@@ -3878,10 +3878,10 @@ static int to_ib_wc_send_op(u32 hr_opcode)
}
static const u32 wc_recv_op_map[] = {
- HR_WC_OP_MAP(RDMA_WRITE_WITH_IMM, WITH_IMM),
- HR_WC_OP_MAP(SEND, RECV),
- HR_WC_OP_MAP(SEND_WITH_IMM, WITH_IMM),
- HR_WC_OP_MAP(SEND_WITH_INV, RECV),
+ HR_IB_WC_OP_MAP(RDMA_WRITE_WITH_IMM, WITH_IMM),
+ HR_IB_WC_OP_MAP(SEND, RECV),
+ HR_IB_WC_OP_MAP(SEND_WITH_IMM, WITH_IMM),
+ HR_IB_WC_OP_MAP(SEND_WITH_INV, RECV),
};
static int to_ib_wc_recv_op(u32 hr_opcode)
The HNS driver will add private opcodes not defined in ib core. Modify the macro's name to distinguish between the two types of opcodes. Signed-off-by: Wenpeng Liang <liangwenpeng@huawei.com> --- drivers/infiniband/hw/hns/hns_roce_hw_v2.c | 62 +++++++++++----------- 1 file changed, 31 insertions(+), 31 deletions(-)