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Mon, 8 Jul 2024 05:01:35 -0700 From: Dragos Tatulea Date: Mon, 8 Jul 2024 15:00:34 +0300 Subject: [PATCH vhost v3 10/24] vdpa/mlx5: Add support for modifying the virtio_version VQ field Precedence: bulk X-Mailing-List: linux-rdma@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <20240708-stage-vdpa-vq-precreate-v3-10-afe3c766e393@nvidia.com> References: <20240708-stage-vdpa-vq-precreate-v3-0-afe3c766e393@nvidia.com> In-Reply-To: <20240708-stage-vdpa-vq-precreate-v3-0-afe3c766e393@nvidia.com> To: "Michael S. Tsirkin" , Jason Wang , Xuan Zhuo , =?utf-8?q?Eugenio_P=C3=A9rez?= , Saeed Mahameed , Leon Romanovsky , Tariq Toukan , Si-Wei Liu CC: , , , , Dragos Tatulea , Cosmin Ratiu X-Mailer: b4 0.13.0 X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BL6PEPF0001AB73:EE_|DS0PR12MB9273:EE_ X-MS-Office365-Filtering-Correlation-Id: b4a759f1-a5f5-4a46-00a7-08dc9f45c5e0 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|1800799024|376014|7416014|36860700013; X-Microsoft-Antispam-Message-Info: =?utf-8?q?WJ8YhcgneBVrATEbjrxT5k5ogiQAtgp?= =?utf-8?q?EJAO677QOGl8ewXI9SqjinpudsZJaK43cLJooSWqidvL9K2RmwjrIZZJkqs3iIh1b?= =?utf-8?q?DNKzeZwwmMjltX/8cWHxkNm072+C6t4UWx4GXotC+QIfZnXNoEqCR7772EeblhoKl?= =?utf-8?q?B1Qxekz/8TWQdmAXiuny2EsAxlBM6KtQ8yIa5eM+oXZbRoY4tJfs158t0yFS8oWg6?= =?utf-8?q?TPhr3IquyN0owvb4Hp8ukbTPPAlFY6naGm2zehxr5v2RuI1+SGm5smW5LXQe9yjrs?= =?utf-8?q?z4YK9QIiomG48mvJb4RyOZKben5pbTN7CBtnOqEQlzj+ReiSycE2pUCngeigDOc8A?= =?utf-8?q?JqAdDKfHO8tZ9Ej7mlzN88KLbAMTJHJdcuuEyN5nKoYUchJiDB83/JK3jR6ahN76p?= =?utf-8?q?y6up7xjXX3m02GA04NeIxlVbNIVUa6Vj9DUehZ0pmXafY87uZM6lGidIjPwBQJt21?= =?utf-8?q?4iQyrCuXW9VoEOmNFjcscZuK8HipwdRKVDqPJVR5/d0fIvaAVVVDWrG9tWzlxTdUZ?= =?utf-8?q?0quDjeCjnmG+/Lf79ewJBAHWZDtKEZaJ6PiYvNv4mbP5NphEPi+/mr13pFcxKMOkQ?= =?utf-8?q?ian0Rg3i0q02FA+P0NBduvW3KSKb/0uxcBT481tEh2c0DZoAzq/Kh2YpfcE++ZYM+?= =?utf-8?q?Kz44nZlmCzfmpSBSZFqDYLxPLOe7OdcaLSwEvhUrinTQcWezy+MYFp8u/M+SuNAUX?= =?utf-8?q?8DoweZnfS8HkHAAEay7COQMi9J2sda8rl07vUBORCXG1PC2o707syyoa0UpUyghne?= =?utf-8?q?tPwfk3QH7OK+knfitmBeqf9GHrprKOFCe8JxL55AmQTTJfY5L59Mm+CRUzg70tlHi?= =?utf-8?q?smEzOvIuKPiVNq0QXATwIdh1Pn2gVkCrNFDe9N+Z+u6iJ8P41MeTUJBDy0xWjKHd1?= =?utf-8?q?2m+AH1GmgK7nQ8/7QtaDg9Xve0pFeMZaFOPySqPXEVkAiN0rDO064GYVqnFCdcB8k?= =?utf-8?q?dXHj1spLL8NmLfYkGRYWDwU4CoLVAiZ6+B6ig/t9kRXkxHSTTFgivJwN6lOWtUmdk?= =?utf-8?q?8de56ZPhBnNZp6k0gcAH2s8lmv9n8jQRNfx4/nX5MuoIdN+w7nWw83MbReyBE10Bj?= =?utf-8?q?OhTesVV/buaZXKLaVl0TP+jTgGJit3HUD8GT/n3hsuIz7fHOCQLLS8tPL4h/q1mVW?= =?utf-8?q?xcgoi8D8GkI+cAibmX0KquN+fbPFDBvIMbyMjYRoyasEiaxLIYCO/2GVZHZPSYUHe?= =?utf-8?q?nz12ttRXlpS8uGn0zdQXe+/zJzliHKJV9OWmso84gTm26nFVStl5aO979DvTyoUxX?= =?utf-8?q?8KoY4ZrJDacxXDIWRe+YHMpEKprDA4m7Y6+t1rtsTAp2g5hYpwwZQA2DdY+gG7VEL?= =?utf-8?q?G5XdhYYYz/WBeB8BHP36QY2BIRW4sAqrIw74MFXuTk5SXeN/DooR8zzZH/EeyCFCS?= =?utf-8?q?vXI3n0G01tp?= X-Forefront-Antispam-Report: CIP:216.228.117.161;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge2.nvidia.com;CAT:NONE;SFS:(13230040)(82310400026)(1800799024)(376014)(7416014)(36860700013);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 08 Jul 2024 12:01:59.9244 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: b4a759f1-a5f5-4a46-00a7-08dc9f45c5e0 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.161];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BL6PEPF0001AB73.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS0PR12MB9273 This is done in preparation for the pre-creation of hardware virtqueues at device add time. Signed-off-by: Dragos Tatulea Reviewed-by: Cosmin Ratiu --- drivers/vdpa/mlx5/net/mlx5_vnet.c | 16 ++++++++++++++++ include/linux/mlx5/mlx5_ifc_vdpa.h | 1 + 2 files changed, 17 insertions(+) diff --git a/drivers/vdpa/mlx5/net/mlx5_vnet.c b/drivers/vdpa/mlx5/net/mlx5_vnet.c index 739c2886fc33..b104849f8477 100644 --- a/drivers/vdpa/mlx5/net/mlx5_vnet.c +++ b/drivers/vdpa/mlx5/net/mlx5_vnet.c @@ -1283,6 +1283,10 @@ static int modify_virtqueue(struct mlx5_vdpa_net *ndev, if (mvq->modified_fields & MLX5_VIRTQ_MODIFY_MASK_VIRTIO_Q_USED_IDX) MLX5_SET(virtio_net_q_object, obj_context, hw_used_index, mvq->used_idx); + if (mvq->modified_fields & MLX5_VIRTQ_MODIFY_MASK_QUEUE_VIRTIO_VERSION) + MLX5_SET(virtio_q, vq_ctx, virtio_version_1_0, + !!(ndev->mvdev.actual_features & BIT_ULL(VIRTIO_F_VERSION_1))); + if (mvq->modified_fields & MLX5_VIRTQ_MODIFY_MASK_VIRTIO_Q_MKEY) { vq_mr = mvdev->mr[mvdev->group2asid[MLX5_VDPA_DATAVQ_GROUP]]; @@ -2709,6 +2713,7 @@ static int mlx5_vdpa_set_driver_features(struct vdpa_device *vdev, u64 features) { struct mlx5_vdpa_dev *mvdev = to_mvdev(vdev); struct mlx5_vdpa_net *ndev = to_mlx5_vdpa_ndev(mvdev); + u64 old_features = mvdev->actual_features; int err; print_features(mvdev, features, true); @@ -2723,6 +2728,17 @@ static int mlx5_vdpa_set_driver_features(struct vdpa_device *vdev, u64 features) else ndev->rqt_size = 1; + /* Interested in changes of vq features only. */ + if (get_features(old_features) != get_features(mvdev->actual_features)) { + for (int i = 0; i < mvdev->max_vqs; ++i) { + struct mlx5_vdpa_virtqueue *mvq = &ndev->vqs[i]; + + mvq->modified_fields |= ( + MLX5_VIRTQ_MODIFY_MASK_QUEUE_VIRTIO_VERSION + ); + } + } + update_cvq_info(mvdev); return err; } diff --git a/include/linux/mlx5/mlx5_ifc_vdpa.h b/include/linux/mlx5/mlx5_ifc_vdpa.h index 40371c916cf9..34f27c01cec9 100644 --- a/include/linux/mlx5/mlx5_ifc_vdpa.h +++ b/include/linux/mlx5/mlx5_ifc_vdpa.h @@ -148,6 +148,7 @@ enum { MLX5_VIRTQ_MODIFY_MASK_VIRTIO_Q_ADDRS = (u64)1 << 6, MLX5_VIRTQ_MODIFY_MASK_VIRTIO_Q_AVAIL_IDX = (u64)1 << 7, MLX5_VIRTQ_MODIFY_MASK_VIRTIO_Q_USED_IDX = (u64)1 << 8, + MLX5_VIRTQ_MODIFY_MASK_QUEUE_VIRTIO_VERSION = (u64)1 << 10, MLX5_VIRTQ_MODIFY_MASK_VIRTIO_Q_MKEY = (u64)1 << 11, MLX5_VIRTQ_MODIFY_MASK_DESC_GROUP_MKEY = (u64)1 << 14, };