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Thu, 20 Feb 2025 13:41:09 -0800 Received: from vdi.nvidia.com (10.127.8.10) by mail.nvidia.com (10.126.190.180) with Microsoft SMTP Server id 15.2.1544.14 via Frontend Transport; Thu, 20 Feb 2025 13:41:05 -0800 From: Tariq Toukan To: "David S. Miller" , Jakub Kicinski , Paolo Abeni , Eric Dumazet , "Andrew Lunn" CC: Gal Pressman , Mark Bloch , "Saeed Mahameed" , Leon Romanovsky , Tariq Toukan , , , , Jianbo Liu , "Leon Romanovsky" , Patrisious Haddad Subject: [PATCH net-next 7/8] net/mlx5e: Add pass flow group for IPSec RX status table Date: Thu, 20 Feb 2025 23:39:57 +0200 Message-ID: <20250220213959.504304-8-tariqt@nvidia.com> X-Mailer: git-send-email 2.45.0 In-Reply-To: <20250220213959.504304-1-tariqt@nvidia.com> References: <20250220213959.504304-1-tariqt@nvidia.com> Precedence: bulk X-Mailing-List: linux-rdma@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-NV-OnPremToCloud: AnonymousSubmission X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SA2PEPF000015C9:EE_|PH7PR12MB6810:EE_ X-MS-Office365-Filtering-Correlation-Id: fa35dd46-73ce-4651-f36d-08dd51f7544e X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700013|82310400026|1800799024|376014; X-Microsoft-Antispam-Message-Info: DKXyg+5TtpIZyXoLletWDm8KDGQewW8pHFg+++dTVRnAvgLEl2R0hSK9tBVa3qDSo0ejGxkqpXwN2APdeWodYzbqtbBRvbN8VLoTywuPNcGKxV+vHnACEf//1y5fCawTZZoBNq9wssyvb/9QUf73pKet+uAohf3imXtMmFy0H36arXsjUfa+Xyw2dJNHnbdeBoo4Y5ww+XepykWUk15KWbScdkjLcz00HJKiagCfCCJDLvt7PvCbBknTh+GpJ9hO7sbxGK5aNjUD+d+tiWkrBshN8MEYlsnN6xQx6hFfywwC3b+/W/7/IvyfO+MayIwYmzrsVnB7Y4w8d7xH/og44GQjp4dTWg6lrYcvf51JQc0kBdFiaRMafD5Ti0PcQP0pYsJquOl0YaEAsRz3W0WFgyzkhVzagfaoSFeAUehTmnbuSqPGuTNm3J7zYBHWu1kkK7WZJ9OI2U+leFVwBbuY7JQPzS4VE07Hip4AaTlzWq1nQZSWvTNZ4FWzIHdZfLJS2vQhTCdbu7tE2zJB+F+htfnivDGiTtN+Gdy0HnvYhX9sb6prTXsS2oH8osCuCgv2lSkhP9JXKH7gyRvj3cbxMt9xlXPdkoZCQQcmJ9A2PeSkO8Fi2xU79DdkqUSMWLSrTuq+mLnm5y5NmjCoTWA+uvclhkRHPE4Jc3diH+J2u+S9FM8ibgfSgd0seexfQrpT7jd04HBxb+AI7iJamJelm7YNTeARzhAVrc2Cw+OC+8QI3tRRc7p6Jx6lYn/yfqvaGxLLcq4GtHE7HvrZJFBZsh2+IQ7LyWxIcVtLGY+O/D7gX4Q3Zh2x1pD0XFXKiDhE27RF3WlnMgzqX0LixDlu5DLE4Axw+klPvkHDviindA3x8bCdgq76Zkg8/eTORk7HqPEEZsZwX4YGHdFDa8K0aKm/8LSNDc3chN42D3ar7DbRVsTUKn7N+9glVarmBItlF+UEU+J1dSC+D+h5vGFWz8UhtQY4DO9ZXrFnu/9T+xt7nUz3Uky3gJ+QrIu71rsejFRxyo04GJwHaW6lU+f6s3ws3SMwZBY/h1LE/su9S80FnvJyl5EF8E17TZnWabSnDceI9wKLxMBbmwGFOJcGGQYFQudkWuxsjC5DTZWb0CnL3lfH4cR6u4QFs++0hOpD9zGjS+s0e7MXdbWZgoEqrRa6qUl+GSZO0OuX6bRmoAiFHxe/5xNl1oN+rpe3rhHWS8mIniwegTvNhVmk5al3/zgJwb5Sdv6utVKEajUmbd6ARzNyZxRZAY5/hBd+JIo+JvN4oLb/77wsM27rG+IO5waXVjn2jforrasaJPHPHYCJiL//U/AdamIeUsHSyV/Cseb74Tiu+rev9ZCiKpV1J11iKaKV1kaa2MSS44HSdguocX3E8nrdEKGtN0uOVvwx0SIQcQgdBcY46EerJjuh9YcBW3qde6Z18ZoR6r10JVyZSQzILHjYz7RCNdnub1yWmaul0rhEHAp/uu9VJP9rwlDyLdKV61DZvwz8oPxfMZA= X-Forefront-Antispam-Report: CIP:216.228.118.233;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc7edge2.nvidia.com;CAT:NONE;SFS:(13230040)(36860700013)(82310400026)(1800799024)(376014);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 20 Feb 2025 21:41:26.8460 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: fa35dd46-73ce-4651-f36d-08dd51f7544e X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.118.233];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: SA2PEPF000015C9.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH7PR12MB6810 From: Jianbo Liu This flow group is added for the pass rules for both crypto offload and packet offload. It is placed at the end of the table, and right before the miss group. There are two entries, and the default pass rules for both offloads are added in this group. Signed-off-by: Jianbo Liu Reviewed-by: Leon Romanovsky Reviewed-by: Patrisious Haddad Signed-off-by: Tariq Toukan --- .../mellanox/mlx5/core/en_accel/ipsec_fs.c | 51 ++++++++++++++++++- 1 file changed, 50 insertions(+), 1 deletion(-) diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec_fs.c b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec_fs.c index 2ee4c7bfd7e6..840d9e0514d3 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec_fs.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec_fs.c @@ -41,6 +41,7 @@ struct mlx5e_ipsec_tx { }; struct mlx5e_ipsec_status_checks { + struct mlx5_flow_group *pass_group; struct mlx5_flow_handle *packet_offload_pass_rule; struct mlx5_flow_handle *crypto_offload_pass_rule; struct mlx5_flow_group *drop_all_group; @@ -397,6 +398,47 @@ static int ipsec_rx_status_drop_all_create(struct mlx5e_ipsec *ipsec, return err; } +static int ipsec_rx_status_pass_group_create(struct mlx5e_ipsec *ipsec, + struct mlx5e_ipsec_rx *rx) +{ + int inlen = MLX5_ST_SZ_BYTES(create_flow_group_in); + struct mlx5_flow_table *ft = rx->ft.status; + struct mlx5_flow_group *fg; + void *match_criteria; + u32 *flow_group_in; + int err = 0; + + flow_group_in = kvzalloc(inlen, GFP_KERNEL); + if (!flow_group_in) + return -ENOMEM; + + MLX5_SET(create_flow_group_in, flow_group_in, match_criteria_enable, + MLX5_MATCH_MISC_PARAMETERS_2); + match_criteria = MLX5_ADDR_OF(create_flow_group_in, flow_group_in, + match_criteria); + MLX5_SET_TO_ONES(fte_match_param, match_criteria, + misc_parameters_2.ipsec_syndrome); + MLX5_SET_TO_ONES(fte_match_param, match_criteria, + misc_parameters_2.metadata_reg_c_4); + + MLX5_SET(create_flow_group_in, flow_group_in, + start_flow_index, ft->max_fte - 3); + MLX5_SET(create_flow_group_in, flow_group_in, + end_flow_index, ft->max_fte - 2); + + fg = mlx5_create_flow_group(ft, flow_group_in); + if (IS_ERR(fg)) { + err = PTR_ERR(fg); + mlx5_core_warn(ipsec->mdev, + "Failed to create rx status pass flow group, err=%d\n", + err); + } + rx->status_checks.pass_group = fg; + + kvfree(flow_group_in); + return err; +} + static struct mlx5_flow_handle * ipsec_rx_status_pass_create(struct mlx5e_ipsec *ipsec, struct mlx5e_ipsec_rx *rx, @@ -446,6 +488,7 @@ static void mlx5_ipsec_rx_status_destroy(struct mlx5e_ipsec *ipsec, struct mlx5e_ipsec_rx *rx) { ipsec_rx_status_pass_destroy(ipsec, rx); + mlx5_destroy_flow_group(rx->status_checks.pass_group); ipsec_rx_status_drop_destroy(ipsec, rx); } @@ -461,6 +504,10 @@ static int mlx5_ipsec_rx_status_create(struct mlx5e_ipsec *ipsec, if (err) return err; + err = ipsec_rx_status_pass_group_create(ipsec, rx); + if (err) + goto err_pass_group_create; + rule = ipsec_rx_status_pass_create(ipsec, rx, dest, MLX5_IPSEC_ASO_SW_CRYPTO_OFFLOAD); if (IS_ERR(rule)) { @@ -485,6 +532,8 @@ static int mlx5_ipsec_rx_status_create(struct mlx5e_ipsec *ipsec, err_packet_offload_pass_create: mlx5_del_flow_rules(rx->status_checks.crypto_offload_pass_rule); err_crypto_offload_pass_create: + mlx5_destroy_flow_group(rx->status_checks.pass_group); +err_pass_group_create: ipsec_rx_status_drop_destroy(ipsec, rx); return err; } @@ -858,7 +907,7 @@ static int rx_create(struct mlx5_core_dev *mdev, struct mlx5e_ipsec *ipsec, if (err) return err; - ft = ipsec_ft_create(attr.ns, attr.status_level, attr.prio, 1, 3, 0); + ft = ipsec_ft_create(attr.ns, attr.status_level, attr.prio, 3, 3, 0); if (IS_ERR(ft)) { err = PTR_ERR(ft); goto err_fs_ft_status;