From patchwork Wed Nov 4 15:30:33 2009 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yevgeny Petrilin X-Patchwork-Id: 57539 Received: from vger.kernel.org (vger.kernel.org [209.132.176.167]) by demeter.kernel.org (8.14.2/8.14.2) with ESMTP id nA4CX2c9022311 for ; Wed, 4 Nov 2009 12:33:02 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755827AbZKDMcu (ORCPT ); Wed, 4 Nov 2009 07:32:50 -0500 Received: (majordomo@vger.kernel.org) by vger.kernel.org id S1755839AbZKDMcu (ORCPT ); Wed, 4 Nov 2009 07:32:50 -0500 Received: from mail.mellanox.co.il ([194.90.237.43]:34584 "EHLO mellanox.co.il" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1755827AbZKDMcs (ORCPT ); Wed, 4 Nov 2009 07:32:48 -0500 Received: from Internal Mail-Server by MTLPINE1 (envelope-from yevgenyp@mellanox.co.il) with SMTP; 4 Nov 2009 14:38:31 +0200 Received: from [10.4.12.75] ([10.4.12.75]) by mtlexch01.mtl.com with Microsoft SMTPSVC(6.0.3790.3959); Wed, 4 Nov 2009 14:32:51 +0200 Message-ID: <4AF19E19.20000@mellanox.co.il> Date: Wed, 04 Nov 2009 17:30:33 +0200 From: Yevgeny Petrilin User-Agent: Thunderbird 2.0.0.23 (X11/20090812) MIME-Version: 1.0 To: rdreier@cisco.com CC: linux-rdma@vger.kernel.org, netdev@vger.kernel.org, liranl@mellanox.co.il, tziporet@mellanox.co.il, yevgenyp@mellanox.co.il Subject: [PATCH 04/25] mlx4_core: add WRITE_MTT support X-OriginalArrivalTime: 04 Nov 2009 12:32:51.0644 (UTC) FILETIME=[ECDE5FC0:01CA5D4A] Sender: linux-rdma-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-rdma@vger.kernel.org diff --git a/drivers/net/mlx4/cmd.c b/drivers/net/mlx4/cmd.c index 03dfdfc..96462f7 100644 --- a/drivers/net/mlx4/cmd.c +++ b/drivers/net/mlx4/cmd.c @@ -36,8 +36,6 @@ #include #include -#include - #include #include "mlx4.h" @@ -441,6 +439,7 @@ static struct mlx4_cmd_info { {MLX4_CMD_QUERY_MPT, 0, 1, 0, NULL, NULL}, /* need verifier */ {MLX4_CMD_HW2SW_MPT, 0, 0, 0, NULL, NULL}, /* need verifier */ {MLX4_CMD_READ_MTT, 0, 1, 0, NULL, NULL}, /* need verifier */ + {MLX4_CMD_WRITE_MTT, 1, 0, 0, NULL, mlx4_WRITE_MTT_wrapper}, {MLX4_CMD_SYNC_TPT, 1, 0, 0, NULL, NULL}, /* need verifier */ {MLX4_CMD_HW2SW_EQ, 0, 0, 0, NULL, NULL}, /* need verifier */ diff --git a/drivers/net/mlx4/mlx4.h b/drivers/net/mlx4/mlx4.h index 88b4ff4..4796982 100644 --- a/drivers/net/mlx4/mlx4.h +++ b/drivers/net/mlx4/mlx4.h @@ -45,6 +45,7 @@ #include #include #include +#include #define DRV_NAME "mlx4_core" #define PFX DRV_NAME ": " @@ -421,6 +422,10 @@ void mlx4_cleanup_qp_table(struct mlx4_dev *dev); void mlx4_cleanup_srq_table(struct mlx4_dev *dev); void mlx4_cleanup_mcg_table(struct mlx4_dev *dev); +int mlx4_WRITE_MTT_wrapper(struct mlx4_dev *dev, int slave, struct mlx4_vhcr *vhcr, + struct mlx4_cmd_mailbox *inbox, + struct mlx4_cmd_mailbox *outbox); + void mlx4_start_catas_poll(struct mlx4_dev *dev); void mlx4_stop_catas_poll(struct mlx4_dev *dev); void mlx4_catas_init(void); diff --git a/drivers/net/mlx4/mr.c b/drivers/net/mlx4/mr.c index ca7ab8e..11a3d26 100644 --- a/drivers/net/mlx4/mr.c +++ b/drivers/net/mlx4/mr.c @@ -262,6 +262,35 @@ static int mlx4_HW2SW_MPT(struct mlx4_dev *dev, struct mlx4_cmd_mailbox *mailbox !mailbox, MLX4_CMD_HW2SW_MPT, MLX4_CMD_TIME_CLASS_B); } +int mlx4_WRITE_MTT_wrapper(struct mlx4_dev *dev, int slave, struct mlx4_vhcr *vhcr, + struct mlx4_cmd_mailbox *inbox, + struct mlx4_cmd_mailbox *outbox) +{ + struct mlx4_mtt mtt; + u64 *page_list = inbox->buf; + int i; + + /* Call the SW implementation of write_mtt: + * - Prepare a dummy mtt struct + * - Translate inbox contents to simple addresses in host endianess */ + mtt.first_seg = 0; + mtt.order = 0; + mtt.page_shift = 0; + for (i = 0; i < vhcr->in_modifier; ++i) + page_list[i + 2] = be64_to_cpu(page_list[i + 2]) & ~1ULL; + vhcr->errno = mlx4_write_mtt(dev, &mtt, be64_to_cpu(page_list[0]), + vhcr->in_modifier, + page_list + 2); + return 0; +} + +static int mlx4_WRITE_MTT(struct mlx4_dev *dev, struct mlx4_cmd_mailbox *mailbox, + int num_entries) +{ + return mlx4_cmd(dev, mailbox->dma, num_entries, 0, MLX4_CMD_WRITE_MTT, + MLX4_CMD_TIME_CLASS_A); +} + int mlx4_mr_alloc(struct mlx4_dev *dev, u32 pd, u64 iova, u64 size, u32 access, int npages, int page_shift, struct mlx4_mr *mr) { @@ -413,24 +442,45 @@ static int mlx4_write_mtt_chunk(struct mlx4_dev *dev, struct mlx4_mtt *mtt, int mlx4_write_mtt(struct mlx4_dev *dev, struct mlx4_mtt *mtt, int start_index, int npages, u64 *page_list) { + struct mlx4_cmd_mailbox *mailbox = NULL; int chunk; - int err; + int err = 0; + __be64 *inbox = NULL; + int i; if (mtt->order < 0) return -EINVAL; + if (mlx4_is_slave(dev)) { + mailbox = mlx4_alloc_cmd_mailbox(dev); + if (IS_ERR(mailbox)) + return PTR_ERR(mailbox); + inbox = mailbox->buf; + } + while (npages > 0) { - chunk = min_t(int, PAGE_SIZE / sizeof(u64), npages); - err = mlx4_write_mtt_chunk(dev, mtt, start_index, chunk, page_list); + if (mlx4_is_slave(dev)) { + chunk = min_t(int, MLX4_MAILBOX_SIZE / sizeof(u64) - MLX4_MTT_ENTRY_PER_SEG, npages); + inbox[0] = cpu_to_be64(mtt->first_seg * MLX4_MTT_ENTRY_PER_SEG + start_index); + inbox[1] = 0; + for (i = 0; i < chunk; ++i) + inbox[i + 2] = cpu_to_be64(page_list[i] | MLX4_MTT_FLAG_PRESENT); + err = mlx4_WRITE_MTT(dev, mailbox, chunk); + } else { + chunk = min_t(int, PAGE_SIZE / sizeof(u64), npages); + err = mlx4_write_mtt_chunk(dev, mtt, start_index, chunk, page_list); + } if (err) - return err; + goto out; npages -= chunk; start_index += chunk; page_list += chunk; } - - return 0; +out: + if (mlx4_is_slave(dev)) + mlx4_free_cmd_mailbox(dev, mailbox); + return err; } EXPORT_SYMBOL_GPL(mlx4_write_mtt);