From patchwork Wed Nov 4 15:31:21 2009 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yevgeny Petrilin X-Patchwork-Id: 57547 Received: from vger.kernel.org (vger.kernel.org [209.132.176.167]) by demeter.kernel.org (8.14.2/8.14.2) with ESMTP id nA4CXhKM022616 for ; Wed, 4 Nov 2009 12:33:43 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755877AbZKDMdg (ORCPT ); Wed, 4 Nov 2009 07:33:36 -0500 Received: (majordomo@vger.kernel.org) by vger.kernel.org id S1755879AbZKDMdg (ORCPT ); Wed, 4 Nov 2009 07:33:36 -0500 Received: from mail.mellanox.co.il ([194.90.237.43]:34693 "EHLO mellanox.co.il" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1755877AbZKDMdg (ORCPT ); Wed, 4 Nov 2009 07:33:36 -0500 Received: from Internal Mail-Server by MTLPINE1 (envelope-from yevgenyp@mellanox.co.il) with SMTP; 4 Nov 2009 14:39:19 +0200 Received: from [10.4.12.75] ([10.4.12.75]) by mtlexch01.mtl.com with Microsoft SMTPSVC(6.0.3790.3959); Wed, 4 Nov 2009 14:33:39 +0200 Message-ID: <4AF19E49.3040401@mellanox.co.il> Date: Wed, 04 Nov 2009 17:31:21 +0200 From: Yevgeny Petrilin User-Agent: Thunderbird 2.0.0.23 (X11/20090812) MIME-Version: 1.0 To: rdreier@cisco.com CC: linux-rdma@vger.kernel.org, netdev@vger.kernel.org, liranl@mellanox.co.il, tziporet@mellanox.co.il, yevgenyp@mellanox.co.il Subject: [PATCH 12/25] mlx4_core: associate resources with specific functions X-OriginalArrivalTime: 04 Nov 2009 12:33:39.0769 (UTC) FILETIME=[098DAA90:01CA5D4B] Sender: linux-rdma-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-rdma@vger.kernel.org diff --git a/drivers/net/mlx4/cq.c b/drivers/net/mlx4/cq.c index 3fb9f7f..9f9f246 100644 --- a/drivers/net/mlx4/cq.c +++ b/drivers/net/mlx4/cq.c @@ -59,7 +59,8 @@ struct mlx4_cq_context { __be32 solicit_producer_index; __be32 consumer_index; __be32 producer_index; - u32 reserved4[2]; + __be32 pd; /* for sriov guest id */ + u32 reserved4; __be64 db_rec_addr; }; @@ -293,6 +294,7 @@ int mlx4_cq_alloc(struct mlx4_dev *dev, int nent, struct mlx4_mtt *mtt, mtt_addr = mlx4_mtt_addr(dev, mtt); cq_context->mtt_base_addr_h = mtt_addr >> 32; cq_context->mtt_base_addr_l = cpu_to_be32(mtt_addr & 0xffffffff); + cq_context->pd = cpu_to_be32(dev->caps.pd_base << dev->caps.slave_pd_shift); cq_context->db_rec_addr = cpu_to_be64(db_rec); err = mlx4_SW2HW_CQ(dev, mailbox, cq->cqn); diff --git a/drivers/net/mlx4/eq.c b/drivers/net/mlx4/eq.c index a27e1c4..46064cc 100644 --- a/drivers/net/mlx4/eq.c +++ b/drivers/net/mlx4/eq.c @@ -486,9 +486,20 @@ static void __iomem *mlx4_get_eq_uar(struct mlx4_dev *dev, struct mlx4_eq *eq) { struct mlx4_priv *priv = mlx4_priv(dev); int index; + int offset; - index = eq->eqn / 4 - dev->caps.reserved_eqs / 4; + /* CX1: slave EQ DBs are located in the comm channel page */ + if (mlx4_is_slave(dev) || mlx4_is_master(dev)) { + if (eq->eqn - dev->caps.reserved_eqs >= MLX4_MFUNC_EQ_NUM) { + mlx4_err(dev, "eqn:%d doorbell out of range (reserved:%d)\n", + eq->eqn, dev->caps.reserved_eqs); + return NULL; + } + offset = 0x800 + (eq->eqn - dev->caps.reserved_eqs) * 8; + return ((void *) priv->mfunc.comm) + offset; + } + index = eq->eqn / 4 - dev->caps.reserved_eqs / 4; if (!priv->eq_table.uar_map[index]) { priv->eq_table.uar_map[index] = ioremap(pci_resource_start(dev->pdev, 2) + diff --git a/drivers/net/mlx4/pd.c b/drivers/net/mlx4/pd.c index c4988d6..08eaf08 100644 --- a/drivers/net/mlx4/pd.c +++ b/drivers/net/mlx4/pd.c @@ -45,7 +45,7 @@ int mlx4_pd_alloc(struct mlx4_dev *dev, u32 *pdn) *pdn = mlx4_bitmap_alloc(&priv->pd_bitmap); if (*pdn == -1) return -ENOMEM; - + *pdn |= dev->caps.pd_base << dev->caps.slave_pd_shift; return 0; } EXPORT_SYMBOL_GPL(mlx4_pd_alloc); @@ -72,12 +72,18 @@ void mlx4_cleanup_pd_table(struct mlx4_dev *dev) int mlx4_uar_alloc(struct mlx4_dev *dev, struct mlx4_uar *uar) { + int offset; + uar->index = mlx4_bitmap_alloc(&mlx4_priv(dev)->uar_table.bitmap); if (uar->index == -1) return -ENOMEM; - uar->pfn = (pci_resource_start(dev->pdev, 2) >> PAGE_SHIFT) + uar->index; - + if (mlx4_is_slave(dev)) + offset = uar->index % ((int) pci_resource_len(dev->pdev, 2) / + dev->caps.uar_page_size); + else + offset = uar->index; + uar->pfn = (pci_resource_start(dev->pdev, 2) >> PAGE_SHIFT) + offset; return 0; } EXPORT_SYMBOL_GPL(mlx4_uar_alloc);