From patchwork Thu Nov 8 09:04:58 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Benjamin Gaignard X-Patchwork-Id: 10673777 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 0C7C513BF for ; Thu, 8 Nov 2018 09:05:18 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id ED85B2B659 for ; Thu, 8 Nov 2018 09:05:17 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id DC7D12BA97; Thu, 8 Nov 2018 09:05:17 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 79AB22B659 for ; Thu, 8 Nov 2018 09:05:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726363AbeKHSjq (ORCPT ); Thu, 8 Nov 2018 13:39:46 -0500 Received: from mail-wr1-f65.google.com ([209.85.221.65]:46454 "EHLO mail-wr1-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726359AbeKHSjq (ORCPT ); Thu, 8 Nov 2018 13:39:46 -0500 Received: by mail-wr1-f65.google.com with SMTP id 74-v6so20319027wrb.13 for ; Thu, 08 Nov 2018 01:05:15 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id; bh=ApR5+JTGZKCLP8UbiiJuNXIs+T0w8vUoXZmHnl/mYkY=; b=Jd5DlcORZDb5WSsHgbdofSkjB4aF/Ka/q9HJztSgKWfIMi9bUfMJPC7VSQzZNKG3R2 bKDUx9I6Av8je/Dz0etejzxrmHw4Gjmqc0/0J608mc28tZo1j54Isn6uFIT9h+HdJDtB zVgVAmH2zLC2pWRcP1b0vvDBJQiUdsY/qdQF4= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=ApR5+JTGZKCLP8UbiiJuNXIs+T0w8vUoXZmHnl/mYkY=; b=pBjysrHR5Q1mCcOghS0ok4oDknItXuw0rJfcIZiMBGEFBj8UK2pGyxfta0yhLEq7d8 inAko5hhVE4U7T5iU+c+bD5wJe1ouTihdd1ZsTADGSilrmdv4iCX9WBFabjGsxsluT97 WBV9VLZfTHsAcu4LNTU0yiVY81rMfKiwOc1dPYWIHkUvwebGKt2ljblxKNXH5mbGYCoG GSAwlqCiqSR1+D0mxK5Mhb1xJZ0v3elvvsyoG2UoG/h+n7u6InNRa6RTxyTww7NClbE1 a2VNxuvETAaEgNdlYyLCnfu/A0mh7tueZiX76sln38J5GXU1pPhCRA2u44+kL5b4AmKG cGfQ== X-Gm-Message-State: AGRZ1gIyeXYv6wBeVvYFjU6aMpTbf4gMvCRHJlHYP2rwGHi87ZDykujF LdS3smwRmGh/em6RxRxtTAXopA== X-Google-Smtp-Source: AJdET5fkQz3aou+ljtoJNnptgC9zWuPzPSv0qVPbEOEpYFow6LmV6GPqsxXq0BaKVFWfDP/VD8JOVw== X-Received: by 2002:adf:ea82:: with SMTP id s2-v6mr3104433wrm.180.1541667914514; Thu, 08 Nov 2018 01:05:14 -0800 (PST) Received: from lmecxl0911.lme.st.com ([2a04:cec0:1094:149:440c:9368:8cda:a020]) by smtp.gmail.com with ESMTPSA id l140-v6sm6974469wmb.24.2018.11.08.01.05.12 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 08 Nov 2018 01:05:13 -0800 (PST) From: Benjamin Gaignard X-Google-Original-From: Benjamin Gaignard To: ohad@wizery.com, bjorn.andersson@linaro.org, robh+dt@kernel.org, mark.rutland@arm.com, alexandre.torgue@st.com Cc: linux-remoteproc@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, Benjamin Gaignard Subject: [PATCH v2 0/4] Add support of STM32 hwspinlock Date: Thu, 8 Nov 2018 10:04:58 +0100 Message-Id: <20181108090502.14543-1-benjamin.gaignard@st.com> X-Mailer: git-send-email 2.15.0 Sender: linux-remoteproc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-remoteproc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This serie adds the support of the hardware semaphore block for stm32mp1 SoC. version 2: - fix comments done by Bjorn about clock naming, license terms in header, alphabetic ordering in Makefile and Kconfig and remove function - Do not push test module in this version while waiting for feedbacks about it Benjamin Gaignard (4): dt-bindings: hwlock: Document STM32 hwspinlock bindings hwspinlock: add STM32 hwspinlock device ARM: dts: stm32: Add hwspinlock node for stm32mp157 SoC ARM: dts: stm32: enable hwspinlock on stm32mp157c-ed1 .../bindings/hwlock/st,stm32-hwspinlock.txt | 23 ++++ arch/arm/boot/dts/stm32mp157c-ed1.dts | 4 + arch/arm/boot/dts/stm32mp157c.dtsi | 9 ++ drivers/hwspinlock/Kconfig | 9 ++ drivers/hwspinlock/Makefile | 1 + drivers/hwspinlock/stm32_hwspinlock.c | 144 +++++++++++++++++++++ 6 files changed, 190 insertions(+) create mode 100644 Documentation/devicetree/bindings/hwlock/st,stm32-hwspinlock.txt create mode 100644 drivers/hwspinlock/stm32_hwspinlock.c