From patchwork Mon Oct 24 15:55:55 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Dwivedi, Avaneesh Kumar (avani)" X-Patchwork-Id: 9392415 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 09B3B607D0 for ; Mon, 24 Oct 2016 15:56:17 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id F105F2907F for ; Mon, 24 Oct 2016 15:56:16 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id E5FB2290E9; Mon, 24 Oct 2016 15:56:16 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 5B1DB2907F for ; Mon, 24 Oct 2016 15:56:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S939692AbcJXP4Q (ORCPT ); Mon, 24 Oct 2016 11:56:16 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:55278 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S938803AbcJXP4P (ORCPT ); Mon, 24 Oct 2016 11:56:15 -0400 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id 64B6A61BB7; Mon, 24 Oct 2016 15:56:14 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1477324574; bh=Iaq5RhygKsrwdVNxN435votEVjO43NZ6iTzlt2J0ixc=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=gxFefEXiF2JEdBVB8blXOMPKZabNK9fEEfZ7WNlvY5DjZwv93KVYmlWaHYnnNotE0 nBxAP2cKg5xhCMSFkRy8itC3do6peTL4n+7HIv0lcyLrnRr8khKAMhg93iR2tudl4f uheEHNneSp8nEmmsorgV1W85L4wailE8itABXF+Q= Received: from akdwived-linux.qualcomm.com (unknown [202.46.23.54]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: akdwived@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 4BE2261714; Mon, 24 Oct 2016 15:56:10 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1477324572; bh=Iaq5RhygKsrwdVNxN435votEVjO43NZ6iTzlt2J0ixc=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=NIKi/M4YJXTETmIkEXxuKt3kj8oGCOIt8QExmsV0or7Q2CflIdpUeiwJ2oY89ZHnw S8Wl6H+ACYX8hhqIyasxpsWuTt6qVz7SentMbOQRWMkgjaZIHbKtOnouXNUyrEZcxp iwHJczMBacd/ClaWTskG+Fx9+20ZI+R+FtmB/tBs= DMARC-Filter: OpenDMARC Filter v1.3.1 smtp.codeaurora.org 4BE2261714 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=pass smtp.mailfrom=akdwived@codeaurora.org From: Avaneesh Kumar Dwivedi To: bjorn.andersson@linaro.org Cc: linux-remoteproc@vger.kernel.org, linux-arm-msm@vger.kernel.org, spjoshi@codeaurora.org, akdwived@codeaurora.org, kaushalk@codeaurora.org Subject: [PATCH 1/5] remoteproc: Add q6v55 specific parameters and enable probing for q6v55 Date: Mon, 24 Oct 2016 21:25:55 +0530 Message-Id: <1477324559-24752-2-git-send-email-akdwived@codeaurora.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1477324559-24752-1-git-send-email-akdwived@codeaurora.org> References: <1477324559-24752-1-git-send-email-akdwived@codeaurora.org> Sender: linux-remoteproc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-remoteproc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Adding required definition of parameters along with new structure fields specific to q6v55 and enabling probe for q6v55 mss remote- proc driver. Signed-off-by: Avaneesh Kumar Dwivedi --- .../devicetree/bindings/remoteproc/qcom,q6v5.txt | 3 +- drivers/remoteproc/qcom_q6v5_pil.c | 33 ++++++++++++++++++++-- 2 files changed, 32 insertions(+), 4 deletions(-) diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt index 57cb49e..0986f8b 100644 --- a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt +++ b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt @@ -7,7 +7,8 @@ on the Qualcomm Hexagon core. Usage: required Value type: Definition: must be one of: - "qcom,q6v5-pil" + "qcom,q6v5-pil", + "qcom,q6v55-pil" - reg: Usage: required diff --git a/drivers/remoteproc/qcom_q6v5_pil.c b/drivers/remoteproc/qcom_q6v5_pil.c index 2e0caaa..8df95a0 100644 --- a/drivers/remoteproc/qcom_q6v5_pil.c +++ b/drivers/remoteproc/qcom_q6v5_pil.c @@ -30,13 +30,14 @@ #include #include #include +#include #include "remoteproc_internal.h" #include "qcom_mdt_loader.h" #include -#define MBA_FIRMWARE_NAME "mba.b00" +#define MBA_FIRMWARE_NAME "mba.mbn" #define MPSS_FIRMWARE_NAME "modem.mdt" #define MPSS_CRASH_REASON_SMEM 421 @@ -65,6 +66,8 @@ #define QDSP6SS_RESET_REG 0x014 #define QDSP6SS_GFMUX_CTL_REG 0x020 #define QDSP6SS_PWR_CTL_REG 0x030 +#define QDSP6SS_MEM_PWR_CTL 0x0B0 +#define QDSP6SS_STRAP_ACC 0x110 /* AXI Halt Register Offsets */ #define AXI_HALTREQ_REG 0x0 @@ -93,13 +96,24 @@ #define QDSS_BHS_ON BIT(21) #define QDSS_LDO_BYP BIT(22) +/* QDSP6v55 parameters */ +#define QDSP6v55_LDO_BYP BIT(25) +#define QDSP6v55_BHS_ON BIT(24) +#define QDSP6v55_CLAMP_WL BIT(21) +#define QDSP6v55_CLAMP_QMC_MEM BIT(22) + +#define HALT_CHECK_MAX_LOOPS (200) +#define QDSP6SS_XO_CBCR (0x0038) + +#define QDSP6SS_ACC_OVERRIDE_VAL 0x20 + struct q6v5 { struct device *dev; struct rproc *rproc; void __iomem *reg_base; void __iomem *rmb_base; - + void __iomem *restart_reg; struct regmap *halt_map; u32 halt_q6; u32 halt_modem; @@ -115,6 +129,13 @@ struct q6v5 { struct clk *ahb_clk; struct clk *axi_clk; struct clk *rom_clk; + struct clk *gpll0_mss_clk; + struct clk *snoc_axi_clk; + struct clk *mnoc_axi_clk; + + struct clk *xo; + struct clk *pnoc_clk; + struct clk *qdss_clk; struct completion start_done; struct completion stop_done; @@ -128,13 +149,18 @@ struct q6v5 { phys_addr_t mpss_reloc; void *mpss_region; size_t mpss_size; + struct mutex q6_lock; + u32 boot_count; + bool unvote_flag; + bool is_q6v55; + bool ahb_clk_vote; }; enum { Q6V5_SUPPLY_CX, Q6V5_SUPPLY_MX, - Q6V5_SUPPLY_MSS, Q6V5_SUPPLY_PLL, + Q6V5_SUPPLY_MSS, }; static int q6v5_regulator_init(struct q6v5 *qproc) @@ -892,6 +918,7 @@ static int q6v5_remove(struct platform_device *pdev) static const struct of_device_id q6v5_of_match[] = { { .compatible = "qcom,q6v5-pil", }, + { .compatible = "qcom,q6v55-pil", }, { }, };