| Message ID | 1662643422-14909-9-git-send-email-quic_srivasam@quicinc.com (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | Update ADSP pil loader for SC7280 platform | expand |
On 9/8/22 6:53 PM, Srinivasa Rao Mandadapu wrote: > Update QDSP6 out-of-reset timeout value to 1 second, as sometimes > ADSP boot failing on SC7280 based platforms with existing value. > Also add few micro seconds sleep after enabling boot core > start register. Please do check if the timeout that you hit is due to lack of required clock/bus scaling. If so increasing the timeout would be just an interim hack and might stop working in the future. > > Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com> > Reviewed-by: Stephen Boyd <swboyd@chromium.org> > --- > drivers/remoteproc/qcom_q6v5_adsp.c | 5 +++-- > 1 file changed, 3 insertions(+), 2 deletions(-) > > diff --git a/drivers/remoteproc/qcom_q6v5_adsp.c b/drivers/remoteproc/qcom_q6v5_adsp.c > index e55d593..4414e23 100644 > --- a/drivers/remoteproc/qcom_q6v5_adsp.c > +++ b/drivers/remoteproc/qcom_q6v5_adsp.c > @@ -34,7 +34,7 @@ > /* time out value */ > #define ACK_TIMEOUT 1000 > #define ACK_TIMEOUT_US 1000000 > -#define BOOT_FSM_TIMEOUT 10000 > +#define BOOT_FSM_TIMEOUT 1000000 > /* mask values */ > #define EVB_MASK GENMASK(27, 4) > /*QDSP6SS register offsets*/ > @@ -422,13 +422,14 @@ static int adsp_start(struct rproc *rproc) > > /* De-assert QDSP6 stop core. QDSP6 will execute after out of reset */ > writel(LPASS_BOOT_CORE_START, adsp->qdsp6ss_base + CORE_START_REG); > + usleep_range(100, 110); > > /* Trigger boot FSM to start QDSP6 */ > writel(LPASS_BOOT_CMD_START, adsp->qdsp6ss_base + BOOT_CMD_REG); > > /* Wait for core to come out of reset */ > ret = readl_poll_timeout(adsp->qdsp6ss_base + BOOT_STATUS_REG, > - val, (val & BIT(0)) != 0, 10, BOOT_FSM_TIMEOUT); > + val, (val & BIT(0)) != 0, 100, BOOT_FSM_TIMEOUT); > if (ret) { > dev_err(adsp->dev, "failed to bootup adsp\n"); > goto disable_adsp_clks; >
On 9/14/2022 3:15 PM, Sibi Sankar wrote: Thanks for Your time Sibi Sankar!!! > > On 9/8/22 6:53 PM, Srinivasa Rao Mandadapu wrote: >> Update QDSP6 out-of-reset timeout value to 1 second, as sometimes >> ADSP boot failing on SC7280 based platforms with existing value. >> Also add few micro seconds sleep after enabling boot core >> start register. > > Please do check if the timeout that you hit is due to lack of > required clock/bus scaling. If so increasing the timeout would > be just an interim hack and might stop working in the future. Okay. Will check and update it as per new findings. > >> >> Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com> >> Reviewed-by: Stephen Boyd <swboyd@chromium.org> >> --- >> drivers/remoteproc/qcom_q6v5_adsp.c | 5 +++-- >> 1 file changed, 3 insertions(+), 2 deletions(-) >> >> diff --git a/drivers/remoteproc/qcom_q6v5_adsp.c >> b/drivers/remoteproc/qcom_q6v5_adsp.c >> index e55d593..4414e23 100644 >> --- a/drivers/remoteproc/qcom_q6v5_adsp.c >> +++ b/drivers/remoteproc/qcom_q6v5_adsp.c >> @@ -34,7 +34,7 @@ >> /* time out value */ >> #define ACK_TIMEOUT 1000 >> #define ACK_TIMEOUT_US 1000000 >> -#define BOOT_FSM_TIMEOUT 10000 >> +#define BOOT_FSM_TIMEOUT 1000000 >> /* mask values */ >> #define EVB_MASK GENMASK(27, 4) >> /*QDSP6SS register offsets*/ >> @@ -422,13 +422,14 @@ static int adsp_start(struct rproc *rproc) >> /* De-assert QDSP6 stop core. QDSP6 will execute after out of >> reset */ >> writel(LPASS_BOOT_CORE_START, adsp->qdsp6ss_base + >> CORE_START_REG); >> + usleep_range(100, 110); >> /* Trigger boot FSM to start QDSP6 */ >> writel(LPASS_BOOT_CMD_START, adsp->qdsp6ss_base + BOOT_CMD_REG); >> /* Wait for core to come out of reset */ >> ret = readl_poll_timeout(adsp->qdsp6ss_base + BOOT_STATUS_REG, >> - val, (val & BIT(0)) != 0, 10, BOOT_FSM_TIMEOUT); >> + val, (val & BIT(0)) != 0, 100, BOOT_FSM_TIMEOUT); >> if (ret) { >> dev_err(adsp->dev, "failed to bootup adsp\n"); >> goto disable_adsp_clks; >>
diff --git a/drivers/remoteproc/qcom_q6v5_adsp.c b/drivers/remoteproc/qcom_q6v5_adsp.c index e55d593..4414e23 100644 --- a/drivers/remoteproc/qcom_q6v5_adsp.c +++ b/drivers/remoteproc/qcom_q6v5_adsp.c @@ -34,7 +34,7 @@ /* time out value */ #define ACK_TIMEOUT 1000 #define ACK_TIMEOUT_US 1000000 -#define BOOT_FSM_TIMEOUT 10000 +#define BOOT_FSM_TIMEOUT 1000000 /* mask values */ #define EVB_MASK GENMASK(27, 4) /*QDSP6SS register offsets*/ @@ -422,13 +422,14 @@ static int adsp_start(struct rproc *rproc) /* De-assert QDSP6 stop core. QDSP6 will execute after out of reset */ writel(LPASS_BOOT_CORE_START, adsp->qdsp6ss_base + CORE_START_REG); + usleep_range(100, 110); /* Trigger boot FSM to start QDSP6 */ writel(LPASS_BOOT_CMD_START, adsp->qdsp6ss_base + BOOT_CMD_REG); /* Wait for core to come out of reset */ ret = readl_poll_timeout(adsp->qdsp6ss_base + BOOT_STATUS_REG, - val, (val & BIT(0)) != 0, 10, BOOT_FSM_TIMEOUT); + val, (val & BIT(0)) != 0, 100, BOOT_FSM_TIMEOUT); if (ret) { dev_err(adsp->dev, "failed to bootup adsp\n"); goto disable_adsp_clks;