| Message ID | 20180521172714.8551-2-sibis@codeaurora.org (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Mon, May 21, 2018 at 10:57:07PM +0530, Sibi Sankar wrote: > Add SDM845 AOSS (always on subsystem) reset controller binding > > Signed-off-by: Sibi Sankar <sibis@codeaurora.org> > --- > .../bindings/reset/qcom,aoss-reset.txt | 52 +++++++++++++++++++ > include/dt-bindings/reset/qcom,sdm845-aoss.h | 17 ++++++ > 2 files changed, 69 insertions(+) > create mode 100644 Documentation/devicetree/bindings/reset/qcom,aoss-reset.txt > create mode 100644 include/dt-bindings/reset/qcom,sdm845-aoss.h Reviewed-by: Rob Herring <robh@kernel.org> -- To unsubscribe from this list: send the line "unsubscribe linux-remoteproc" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On Mon 21 May 10:27 PDT 2018, Sibi Sankar wrote: > Add SDM845 AOSS (always on subsystem) reset controller binding > I think it would be better if you made the binding represent the entire clock controller, rather than only the reset-related portion of it. As I can't find anything in the downstream kernel that references the clock part of the hardware block I think the driver can be kept as is (with updated compatible and adjust the offsets of the registers) This makes the DT better represents the hardware and it makes it possible to control the clocks in the future, without breaking backwards compatibility with existing DTBs. > Signed-off-by: Sibi Sankar <sibis@codeaurora.org> > --- > .../bindings/reset/qcom,aoss-reset.txt | 52 +++++++++++++++++++ > include/dt-bindings/reset/qcom,sdm845-aoss.h | 17 ++++++ > 2 files changed, 69 insertions(+) > create mode 100644 Documentation/devicetree/bindings/reset/qcom,aoss-reset.txt > create mode 100644 include/dt-bindings/reset/qcom,sdm845-aoss.h > > diff --git a/Documentation/devicetree/bindings/reset/qcom,aoss-reset.txt b/Documentation/devicetree/bindings/reset/qcom,aoss-reset.txt > new file mode 100644 > index 000000000000..cd5dcafb4ed7 > --- /dev/null > +++ b/Documentation/devicetree/bindings/reset/qcom,aoss-reset.txt > @@ -0,0 +1,52 @@ > +Qualcomm AOSS Reset Controller > +====================================== > + > +This binding describes a reset-controller found on AOSS (always on subsystem) > +for Qualcomm SDM845 SoCs. > + > +Required properties: > +- compatible: > + Usage: required > + Value type: <string> > + Definition: must be: > + "qcom,sdm845-aoss-reset" qcom,sdm845-aoss-cc > + > +- reg: > + Usage: required > + Value type: <prop-encoded-array> > + Definition: must specify the base address and size of the register > + space. > + > +- #reset-cells: > + Usage: required > + Value type: <uint> > + Definition: must be 1; cell entry represents the reset index. > + > +Example: > + > +aoss_reset: reset-controller@c2b0000 { > + compatible = "qcom,sdm845-aoss-reset"; > + reg = <0xc2b0000 0x21000>; reg = <0xc2a0000 0x31000>; > + #reset-cells = <1>; > +}; > + Apart from this the binding looks good! Regards, Bjorn -- To unsubscribe from this list: send the line "unsubscribe linux-remoteproc" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Hi Bjorn, Thanks for the review will address the comments in the next respin. On 06/23/2018 06:14 AM, Bjorn Andersson wrote: > On Mon 21 May 10:27 PDT 2018, Sibi Sankar wrote: > >> Add SDM845 AOSS (always on subsystem) reset controller binding >> > > I think it would be better if you made the binding represent the entire > clock controller, rather than only the reset-related portion of it. > > As I can't find anything in the downstream kernel that references the > clock part of the hardware block I think the driver can be kept as is > (with updated compatible and adjust the offsets of the registers) > > > This makes the DT better represents the hardware and it makes it > possible to control the clocks in the future, without breaking backwards > compatibility with existing DTBs. > yup makes sense. >> Signed-off-by: Sibi Sankar <sibis@codeaurora.org> >> --- >> .../bindings/reset/qcom,aoss-reset.txt | 52 +++++++++++++++++++ >> include/dt-bindings/reset/qcom,sdm845-aoss.h | 17 ++++++ >> 2 files changed, 69 insertions(+) >> create mode 100644 Documentation/devicetree/bindings/reset/qcom,aoss-reset.txt >> create mode 100644 include/dt-bindings/reset/qcom,sdm845-aoss.h >> >> diff --git a/Documentation/devicetree/bindings/reset/qcom,aoss-reset.txt b/Documentation/devicetree/bindings/reset/qcom,aoss-reset.txt >> new file mode 100644 >> index 000000000000..cd5dcafb4ed7 >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/reset/qcom,aoss-reset.txt >> @@ -0,0 +1,52 @@ >> +Qualcomm AOSS Reset Controller >> +====================================== >> + >> +This binding describes a reset-controller found on AOSS (always on subsystem) >> +for Qualcomm SDM845 SoCs. >> + >> +Required properties: >> +- compatible: >> + Usage: required >> + Value type: <string> >> + Definition: must be: >> + "qcom,sdm845-aoss-reset" > > qcom,sdm845-aoss-cc > >> + >> +- reg: >> + Usage: required >> + Value type: <prop-encoded-array> >> + Definition: must specify the base address and size of the register >> + space. >> + >> +- #reset-cells: >> + Usage: required >> + Value type: <uint> >> + Definition: must be 1; cell entry represents the reset index. >> + >> +Example: >> + >> +aoss_reset: reset-controller@c2b0000 { >> + compatible = "qcom,sdm845-aoss-reset"; >> + reg = <0xc2b0000 0x21000>; > > reg = <0xc2a0000 0x31000>; > >> + #reset-cells = <1>; >> +}; >> + > > Apart from this the binding looks good! > > Regards, > Bjorn >
diff --git a/Documentation/devicetree/bindings/reset/qcom,aoss-reset.txt b/Documentation/devicetree/bindings/reset/qcom,aoss-reset.txt new file mode 100644 index 000000000000..cd5dcafb4ed7 --- /dev/null +++ b/Documentation/devicetree/bindings/reset/qcom,aoss-reset.txt @@ -0,0 +1,52 @@ +Qualcomm AOSS Reset Controller +====================================== + +This binding describes a reset-controller found on AOSS (always on subsystem) +for Qualcomm SDM845 SoCs. + +Required properties: +- compatible: + Usage: required + Value type: <string> + Definition: must be: + "qcom,sdm845-aoss-reset" + +- reg: + Usage: required + Value type: <prop-encoded-array> + Definition: must specify the base address and size of the register + space. + +- #reset-cells: + Usage: required + Value type: <uint> + Definition: must be 1; cell entry represents the reset index. + +Example: + +aoss_reset: reset-controller@c2b0000 { + compatible = "qcom,sdm845-aoss-reset"; + reg = <0xc2b0000 0x21000>; + #reset-cells = <1>; +}; + +Specifying reset lines connected to IP modules +============================================== + +Device nodes that need access to reset lines should +specify them as a reset phandle in their corresponding node as +specified in reset.txt. + +For list of all valid reset indicies see +<dt-bindings/reset/qcom,sdm845-aoss.h> + +Example: + +modem-pil@4080000 { + ... + + resets = <&aoss_reset AOSS_CC_MSS_RESTART>; + reset-names = "mss_restart"; + + ... +}; diff --git a/include/dt-bindings/reset/qcom,sdm845-aoss.h b/include/dt-bindings/reset/qcom,sdm845-aoss.h new file mode 100644 index 000000000000..476c5fc873b6 --- /dev/null +++ b/include/dt-bindings/reset/qcom,sdm845-aoss.h @@ -0,0 +1,17 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (C) 2018 The Linux Foundation. All rights reserved. + */ + +#ifndef _DT_BINDINGS_RESET_AOSS_SDM_845_H +#define _DT_BINDINGS_RESET_AOSS_SDM_845_H + +#define AOSS_CC_MSS_RESTART 0 +#define AOSS_CC_CAMSS_RESTART 1 +#define AOSS_CC_VENUS_RESTART 2 +#define AOSS_CC_GPU_RESTART 3 +#define AOSS_CC_DISPSS_RESTART 4 +#define AOSS_CC_WCSS_RESTART 5 +#define AOSS_CC_LPASS_RESTART 6 + +#endif
Add SDM845 AOSS (always on subsystem) reset controller binding Signed-off-by: Sibi Sankar <sibis@codeaurora.org> --- .../bindings/reset/qcom,aoss-reset.txt | 52 +++++++++++++++++++ include/dt-bindings/reset/qcom,sdm845-aoss.h | 17 ++++++ 2 files changed, 69 insertions(+) create mode 100644 Documentation/devicetree/bindings/reset/qcom,aoss-reset.txt create mode 100644 include/dt-bindings/reset/qcom,sdm845-aoss.h