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Fri, 27 Jul 2018 15:28:20 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1532705303; bh=ufMeDiTiQBILFJ97ut1Zwrka7u4qNQCX/o+I6+AiyaA=; h=From:To:Cc:Subject:Date:From; b=MbxQKX8/jCFkXNgqmAs0pz5b4XiyerV7V1bOy/RBqK/coQwDTsMKK19QCMiDxrhyw 7pxIPO7Kn0aXNPFV3E6VZTnISTWVVYvoAS+So8Mgd8E/qVoEjYjE7pFTTNnJrUDgox A/PNHPlCKEDnTOjbRxKz+QtfQ7yoAkj+PAuvBXMc= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 36FF460481 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=sibis@codeaurora.org From: Sibi Sankar To: bjorn.andersson@linaro.org, p.zabel@pengutronix.de, robh+dt@kernel.org Cc: linux-remoteproc@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, ohad@wizery.com, mark.rutland@arm.com, sricharan@codeaurora.org, akdwived@codeaurora.org, linux-arm-msm@vger.kernel.org, tsoni@codeaurora.org, Sibi Sankar Subject: [PATCH 1/4] dt-bindings: reset: Add PDC reset binding for SDM845 SoCs Date: Fri, 27 Jul 2018 20:58:08 +0530 Message-Id: <20180727152811.15258-1-sibis@codeaurora.org> X-Mailer: git-send-email 2.17.0 Sender: linux-remoteproc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-remoteproc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add SDM845 PDC (Power Domain Controller) reset controller binding Signed-off-by: Sibi Sankar --- .../bindings/reset/qcom,pdc-reset.txt | 52 +++++++++++++++++++ include/dt-bindings/reset/qcom,sdm845-pdc.h | 20 +++++++ 2 files changed, 72 insertions(+) create mode 100644 Documentation/devicetree/bindings/reset/qcom,pdc-reset.txt create mode 100644 include/dt-bindings/reset/qcom,sdm845-pdc.h diff --git a/Documentation/devicetree/bindings/reset/qcom,pdc-reset.txt b/Documentation/devicetree/bindings/reset/qcom,pdc-reset.txt new file mode 100644 index 000000000000..85e159962e08 --- /dev/null +++ b/Documentation/devicetree/bindings/reset/qcom,pdc-reset.txt @@ -0,0 +1,52 @@ +PDC Reset Controller +====================================== + +This binding describes a reset-controller found on PDC-Global(Power Domain +Controller) block for Qualcomm Technologies Inc SDM845 SoCs. + +Required properties: +- compatible: + Usage: required + Value type: + Definition: must be: + "qcom,sdm845-pdc-global" + +- reg: + Usage: required + Value type: + Definition: must specify the base address and size of the register + space. + +- #reset-cells: + Usage: required + Value type: + Definition: must be 1; cell entry represents the reset index. + +Example: + +pdc_reset: reset-controller@b2e0000 { + compatible = "qcom,sdm845-pdc-global"; + reg = <0xb2e0000 0x20000>; + #reset-cells = <1>; +}; + +PDC reset clients +====================================== + +Device nodes that need access to reset lines should +specify them as a reset phandle in their corresponding node as +specified in reset.txt. + +For list of all valid reset indicies see + + +Example: + +modem-pil@4080000 { + ... + + resets = <&pdc_reset PDC_MODEM_SYNC_RESET>; + reset-names = "pdc_restart"; + + ... +}; diff --git a/include/dt-bindings/reset/qcom,sdm845-pdc.h b/include/dt-bindings/reset/qcom,sdm845-pdc.h new file mode 100644 index 000000000000..53c37f9c319a --- /dev/null +++ b/include/dt-bindings/reset/qcom,sdm845-pdc.h @@ -0,0 +1,20 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (C) 2018 The Linux Foundation. All rights reserved. + */ + +#ifndef _DT_BINDINGS_RESET_PDC_SDM_845_H +#define _DT_BINDINGS_RESET_PDC_SDM_845_H + +#define PDC_APPS_SYNC_RESET 0 +#define PDC_SP_SYNC_RESET 1 +#define PDC_AUDIO_SYNC_RESET 2 +#define PDC_SENSORS_SYNC_RESET 3 +#define PDC_AOP_SYNC_RESET 4 +#define PDC_DEBUG_SYNC_RESET 5 +#define PDC_GPU_SYNC_RESET 6 +#define PDC_DISPLAY_SYNC_RESET 7 +#define PDC_COMPUTE_SYNC_RESET 8 +#define PDC_MODEM_SYNC_RESET 9 + +#endif