From patchwork Wed Oct 31 09:30:28 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Benjamin Gaignard X-Patchwork-Id: 10662315 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id BD10215E9 for ; Wed, 31 Oct 2018 09:30:55 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id AC2F82A33E for ; Wed, 31 Oct 2018 09:30:55 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id A02172A344; Wed, 31 Oct 2018 09:30:55 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id AEFA92A33E for ; Wed, 31 Oct 2018 09:30:53 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728099AbeJaS2L (ORCPT ); Wed, 31 Oct 2018 14:28:11 -0400 Received: from mail-wr1-f68.google.com ([209.85.221.68]:42145 "EHLO mail-wr1-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728086AbeJaS2L (ORCPT ); Wed, 31 Oct 2018 14:28:11 -0400 Received: by mail-wr1-f68.google.com with SMTP id y15-v6so15638878wru.9 for ; Wed, 31 Oct 2018 02:30:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=ZKXzc/9xi2oqrkPABloEIrBfH+ajRu+w1WHKhdOM4Rk=; b=aan0EMnXfDfOU3ca4R0bzQftvlM4ux2NUaP9DsCSp15jp64rmSsQvkALE+o9L+aXNj NTBE2ziWR+VhvyST0Upny13wP0AL3yUYufEUy+qscRzayHjwqqJCrFx+2ZI7w+XZik8h OQKLeLjjRSWHFGdJSu8tczyhIjt85xRHN5Dsk= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=ZKXzc/9xi2oqrkPABloEIrBfH+ajRu+w1WHKhdOM4Rk=; b=JyebTwq6WvCdwHsrycv/cSAUuLU3zeDiZNIW2t9gxLNkmLzBmhBVVzqqLrr242hX/9 k14uL7eLAJ/kggKetpCapKhqmaxFk9fZeOI9bpq/aGhnicFeaerheyplhNhA45AxTCOc haVaYZenrAn2/FSl6ff0ZbPftqhjuWRV6QamKuHgJoBLLRZaak4+R/Mptamq3Zc48Rjp akCH/STwy+X6BIuSZ093dyX69cEPgUJPOStfCNY0uhQLTQwz0mBORZv968UEkL9obnfl ZCmIimkLPOq1YBJSVm37rtyhKbn0mbS+HSLBRBWs8o7WQamMQ+R5VGUATFXv9e31/qav qG3w== X-Gm-Message-State: AGRZ1gLwz2L6LHS3hNfpbEBfE8XWziQNQmzT2hy2KxHu44z7inv1TzZm cokd1jLzoPK7MJr0N89f6d8qug== X-Google-Smtp-Source: AJdET5cjhOAsBRDqNKR9ofuUFrrUZAH72t0ymGqkOxje1ysdvRhXFohd0iet1pmQ4nYBn5Upa2vqlA== X-Received: by 2002:adf:e485:: with SMTP id i5-v6mr1953416wrm.101.1540978250250; Wed, 31 Oct 2018 02:30:50 -0700 (PDT) Received: from lmecxl0911.lme.st.com ([2a04:cec0:1086:999:fd1b:8629:a7fc:68b]) by smtp.gmail.com with ESMTPSA id w14-v6sm10737377wrt.73.2018.10.31.02.30.48 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 31 Oct 2018 02:30:49 -0700 (PDT) From: Benjamin Gaignard X-Google-Original-From: Benjamin Gaignard To: ohad@wizery.com, bjorn.andersson@linaro.org, robh+dt@kernel.org, mark.rutland@arm.com, alexandre.torgue@st.com Cc: linux-remoteproc@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, Benjamin Gaignard Subject: [PATCH 1/5] dt-bindings: hwlock: Document STM32 hwspinlock bindings Date: Wed, 31 Oct 2018 10:30:28 +0100 Message-Id: <20181031093032.20386-2-benjamin.gaignard@st.com> X-Mailer: git-send-email 2.15.0 In-Reply-To: <20181031093032.20386-1-benjamin.gaignard@st.com> References: <20181031093032.20386-1-benjamin.gaignard@st.com> Sender: linux-remoteproc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-remoteproc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add bindings for STM32 hardware spinlock device Signed-off-by: Benjamin Gaignard --- .../bindings/hwlock/st,stm32-hwspinlock.txt | 23 ++++++++++++++++++++++ 1 file changed, 23 insertions(+) create mode 100644 Documentation/devicetree/bindings/hwlock/st,stm32-hwspinlock.txt diff --git a/Documentation/devicetree/bindings/hwlock/st,stm32-hwspinlock.txt b/Documentation/devicetree/bindings/hwlock/st,stm32-hwspinlock.txt new file mode 100644 index 000000000000..7a999479d802 --- /dev/null +++ b/Documentation/devicetree/bindings/hwlock/st,stm32-hwspinlock.txt @@ -0,0 +1,23 @@ +STM32 Hardware Spinlock Device Binding +------------------------------------- + +Required properties : +- compatible : should be "st,stm32-hwspinlock". +- reg : the register address of hwspinlock. +- #hwlock-cells : hwlock users only use the hwlock id to represent a specific + hwlock, so the number of cells should be <1> here. +- clock-names : Must contain "hwspinlock". +- clocks : Must contain a phandle entry for the clock in clock-names, see the + common clock bindings. + +Please look at the generic hwlock binding for usage information for consumers, +"Documentation/devicetree/bindings/hwlock/hwlock.txt" + +Example of hwlock provider: + hwspinlock@4c000000 { + compatible = "st,stm32-hwspinlock"; + #hwlock-cells = <1>; + reg = <0x4c000000 0x400>; + clocks = <&rcc HSEM>; + clock-names = "hwspinlock"; + };