From patchwork Wed Oct 14 12:54:39 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Arnaud POULIQUEN X-Patchwork-Id: 11837619 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 54E5A15E6 for ; Wed, 14 Oct 2020 12:55:34 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 1A36622242 for ; Wed, 14 Oct 2020 12:55:34 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=st.com header.i=@st.com header.b="FADOcfjh" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729886AbgJNMzZ (ORCPT ); Wed, 14 Oct 2020 08:55:25 -0400 Received: from mx07-00178001.pphosted.com ([185.132.182.106]:56100 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729267AbgJNMzY (ORCPT ); Wed, 14 Oct 2020 08:55:24 -0400 Received: from pps.filterd (m0046037.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id 09ECr9no003174; Wed, 14 Oct 2020 14:55:13 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=st.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=STMicroelectronics; bh=jPr7oz6V/C/0BCEXLC3ve38DWAGIvboOAC9KbnxfjRg=; b=FADOcfjh94aoXJOAUwU11FS9n2wTKyglNEX1KyRCI6gxkZOAUInXdcIxhR+xUoYOnH/k dCKuZwwTkBbRsbPGlzWb0bgMkMsrBn5PcX4VWtbLYHilekkHdOkewdSGBw7gDyYobXdD ctgOgS0SqyOrkUazbpjbM7ThiZzvF43Ys3wp1x9XKNo7axj8iY90N7taDJWh9NeqBvP/ GmSS2VNxrB/GwVGDqkSehm/ZxoAApFqcNoIuRInAqAc4ZC9tfUS7UrPQM19f2wrvRmj6 C1IrfwwxxirRfV/K2Y9mqPCPXjYwoRgISZJLatfv5cbe+zBTfzI+LUU0q1q/whWN2tPp 6Q== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com with ESMTP id 34356edsr4-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 14 Oct 2020 14:55:13 +0200 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id E092810002A; Wed, 14 Oct 2020 14:55:11 +0200 (CEST) Received: from Webmail-eu.st.com (sfhdag3node1.st.com [10.75.127.7]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id D1AC82DA52A; Wed, 14 Oct 2020 14:55:11 +0200 (CEST) Received: from localhost (10.75.127.45) by SFHDAG3NODE1.st.com (10.75.127.7) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Wed, 14 Oct 2020 14:55:11 +0200 From: Arnaud Pouliquen To: Rob Herring , Alexandre Torgue CC: , , , , , Arnaud Pouliquen , Mathieu Poirier , Ohad Ben-Cohen , Bjorn Andersson , Ahmad Fatoum Subject: [PATCH v2 2/4] dt-bindings: remoteproc: stm32_rproc: update for firmware synchronization Date: Wed, 14 Oct 2020 14:54:39 +0200 Message-ID: <20201014125441.2457-3-arnaud.pouliquen@st.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20201014125441.2457-1-arnaud.pouliquen@st.com> References: <20201014125441.2457-1-arnaud.pouliquen@st.com> MIME-Version: 1.0 X-Originating-IP: [10.75.127.45] X-ClientProxiedBy: SFHDAG7NODE3.st.com (10.75.127.21) To SFHDAG3NODE1.st.com (10.75.127.7) X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.235,18.0.687 definitions=2020-10-14_07:2020-10-14,2020-10-14 signatures=0 Precedence: bulk List-ID: X-Mailing-List: linux-remoteproc@vger.kernel.org Add new properties description used to attach to a pre-loaded firmware according to the commit 9276536f455b3 ("remoteproc: stm32: Parse syscon that will manage M4 synchronisation") which updates the driver part. Signed-off-by: Arnaud Pouliquen Reviewed-by: Rob Herring --- .../bindings/remoteproc/st,stm32-rproc.yaml | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/Documentation/devicetree/bindings/remoteproc/st,stm32-rproc.yaml b/Documentation/devicetree/bindings/remoteproc/st,stm32-rproc.yaml index 4ffa25268fcc..3207942d51bf 100644 --- a/Documentation/devicetree/bindings/remoteproc/st,stm32-rproc.yaml +++ b/Documentation/devicetree/bindings/remoteproc/st,stm32-rproc.yaml @@ -96,6 +96,19 @@ properties: 3rd cell: register bitmask for the deep sleep bit maxItems: 1 + st,syscfg-m4-state: + $ref: "/schemas/types.yaml#/definitions/phandle-array" + description: | + Reference to the tamp register which exposes the Cortex-M4 state. + maxItems: 1 + + st,syscfg-rsc-tbl: + $ref: "/schemas/types.yaml#/definitions/phandle-array" + description: | + Reference to the tamp register which references the Cortex-M4 + resource table address. + maxItems: 1 + st,auto-boot: $ref: /schemas/types.yaml#/definitions/flag description: @@ -122,6 +135,8 @@ examples: resets = <&rcc MCU_R>; st,syscfg-holdboot = <&rcc 0x10C 0x1>; st,syscfg-tz = <&rcc 0x000 0x1>; + st,syscfg-rsc-tbl = <&tamp 0x144 0xFFFFFFFF>; + st,syscfg-m4-state = <&tamp 0x148 0xFFFFFFFF>; }; ...