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Thu, 7 Jul 2022 20:40:30 -0500 From: Tanmay Shah To: , , , , , , , CC: , , , , Tanmay Shah Subject: [PATCH v9 2/6] arm64: dts: xilinx: zynqmp: Add RPU subsystem device node Date: Thu, 7 Jul 2022 18:39:51 -0700 Message-ID: <20220708013955.2340449-3-tanmay.shah@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220708013955.2340449-1-tanmay.shah@amd.com> References: <20220708013955.2340449-1-tanmay.shah@amd.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: ec68d024-1e22-4b9f-553b-08da6082d8a5 X-MS-TrafficTypeDiagnostic: CH2PR12MB3784:EE_ X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: nxoKoOOmalluleAeuT1X/Re62TYjYZiDwWUtuEAmJEg6Np3uqNlCPpc7Z6tS/eR9g2tNkJ5ISvAeU2SPaVLp7hqennfvUMo5T7r9X/Qe4ozfM2hJDp51ZuYerUmMDJHNXm/gKbt8yR2bGP/8Re7HhuMTc8qiTEdK43Ykn8wYSFNyi27AkrXIGVPDDvfjVhMMU0C+dj4GQ+yNkxf5lt3WJzbxVB2onz46p//z71c8LNTJTf2Z0xnadc2xk73S7egqeyB+SPIAxX+RTPTGqPS1mUjA5JfdLVJl4amMpo8nKOe9FwVT26l00orEnkA8xE/T9uU9iOuMiLNOqS9DBW7p3bk1hS6rnYL2QLIMTW9QYthVdHmdmk2qVSgsjk5I+/gR99DFy7o36tPt6Q8v/KaY2diUW6Nn3FaP97qhQiqEgKVa5v7YTx0dy3IV+aCUkjPsaZqQh9fyPthfS7SUwG3aBaBlTxWkl2uHutvv1dcFe+6yNjyGm/K8Yvo3+mkdVMikutCo0zb4jYoMvXqjSf9O+HSi9d7H14eQIIBnkmNDzXB9prna78Wx7zir/sAYB+IMIwL3KoVDzZ3KfcjN9txhRTXOpauOSeYgsDvpOHNdZt5r3iX0WyV/1tHIPtXFyrgku5bgysxRmCvnJntnsaxi3mrFlajD2T1j/AkQpSdBcXFRX+eU0wttoiEFpGVmiajzgDcWtvHSofLqvpGwwadqEQLQ66eq13iYs9KRl1Jeua8w8pY1au5O0wWIghHChyVP6oDMjAuVj1ryJxtZFI/qigulJAYPIN7v9/h4gUUGg5xh/ID6ZsnA0+xpyXp5Ux06oms9Ji/oBmIyyjvbaJdf/SWEOViYW8gzo9Xpp6te3veU07ilb8jsIeDBcFLIWnN2 X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB03.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230016)(4636009)(136003)(376002)(346002)(396003)(39860400002)(40470700004)(36840700001)(46966006)(2906002)(6666004)(41300700001)(82310400005)(478600001)(86362001)(82740400003)(356005)(81166007)(70206006)(70586007)(83380400001)(2616005)(54906003)(1076003)(4326008)(8676002)(47076005)(426003)(336012)(40460700003)(26005)(36860700001)(44832011)(40480700001)(8936002)(34020700004)(110136005)(36756003)(316002)(6636002)(186003)(5660300002)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 08 Jul 2022 01:40:32.0888 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: ec68d024-1e22-4b9f-553b-08da6082d8a5 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT031.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH2PR12MB3784 Precedence: bulk List-ID: X-Mailing-List: linux-remoteproc@vger.kernel.org From: Tanmay Shah RPU subsystem can be configured in cluster-mode or split mode. Also each r5 core has separate power domains. Signed-off-by: Tanmay Shah Signed-off-by: Tanmay Shah --- Changes in v9: - remove unused labels Changes in v8: - None Changes in v7: - None Changes in v6: - None Changes in v5: - Remove optional reg property from r5fss node - Move r5fss node out of axi node Changes in v4: - Add reserved memory region node and use it in RPU subsystem node Changes in v3: - Fix checkpatch.pl style warning arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 33 ++++++++++++++++++++++++++ 1 file changed, 33 insertions(+) diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi index c715a18368c2..1c19d9a03c49 100644 --- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi +++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi @@ -100,6 +100,22 @@ opp03 { }; }; + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + rproc_0_fw_image: memory@3ed00000 { + no-map; + reg = <0x0 0x3ed00000 0x0 0x40000>; + }; + + rproc_1_fw_image: memory@3ef00000 { + no-map; + reg = <0x0 0x3ef00000 0x0 0x40000>; + }; + }; + zynqmp_ipi: zynqmp_ipi { compatible = "xlnx,zynqmp-ipi-mailbox"; interrupt-parent = <&gic>; @@ -203,6 +219,23 @@ fpga_full: fpga-full { ranges; }; + r5fss { + compatible = "xlnx,zynqmp-r5fss"; + xlnx,cluster-mode = <1>; + + r5f-0 { + compatible = "xlnx,zynqmp-r5f"; + power-domains = <&zynqmp_firmware PD_RPU_0>; + memory-region = <&rproc_0_fw_image>; + }; + + r5f-1 { + compatible = "xlnx,zynqmp-r5f"; + power-domains = <&zynqmp_firmware PD_RPU_1>; + memory-region = <&rproc_1_fw_image>; + }; + }; + amba: axi { compatible = "simple-bus"; #address-cells = <2>;