| Message ID | 20240621114659.2958170-8-quic_gokulsri@quicinc.com (mailing list archive) |
|---|---|
| State | Not Applicable |
| Headers | show |
| Series | remoteproc: qcom: q6v5-wcss: Add support for secure pil | expand |
On 6/21/2024 5:16 PM, Gokul Sriram Palanisamy wrote: > Add WCSSAON reset required for Q6v5 on IPQ8074 SoC. Commit title can be written as "clk: qcom: ipq8074: Add WCSSAON reset" ? With that, Reviewed-by: Kathiravan Thirumoorthy <quic_kathirav@quicinc.com> > > Signed-off-by: Nikhil Prakash V <quic_nprakash@quicinc.com> > Signed-off-by: Sricharan R <quic_srichara@quicinc.com> > Signed-off-by: Gokul Sriram Palanisamy <quic_gokulsri@quicinc.com> > Acked-by: Stephen Boyd <sboyd@kernel.org> > --- > drivers/clk/qcom/gcc-ipq8074.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/drivers/clk/qcom/gcc-ipq8074.c b/drivers/clk/qcom/gcc-ipq8074.c > index 32fd01ef469a..d382d16b9c10 100644 > --- a/drivers/clk/qcom/gcc-ipq8074.c > +++ b/drivers/clk/qcom/gcc-ipq8074.c > @@ -4712,6 +4712,7 @@ static const struct qcom_reset_map gcc_ipq8074_resets[] = { > [GCC_NSSPORT4_RESET] = { .reg = 0x68014, .bitmask = BIT(27) | GENMASK(9, 8) }, > [GCC_NSSPORT5_RESET] = { .reg = 0x68014, .bitmask = BIT(28) | GENMASK(11, 10) }, > [GCC_NSSPORT6_RESET] = { .reg = 0x68014, .bitmask = BIT(29) | GENMASK(13, 12) }, > + [GCC_WCSSAON_RESET] = { 0x59010, 0 }, > }; > > static struct gdsc *gcc_ipq8074_gdscs[] = {
On Fri, Jun 21, 2024 at 05:16:58PM GMT, Gokul Sriram Palanisamy wrote: > Add WCSSAON reset required for Q6v5 on IPQ8074 SoC. > > Signed-off-by: Nikhil Prakash V <quic_nprakash@quicinc.com> > Signed-off-by: Sricharan R <quic_srichara@quicinc.com> > Signed-off-by: Gokul Sriram Palanisamy <quic_gokulsri@quicinc.com> Three authors for a single line? > Acked-by: Stephen Boyd <sboyd@kernel.org> > --- > drivers/clk/qcom/gcc-ipq8074.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/drivers/clk/qcom/gcc-ipq8074.c b/drivers/clk/qcom/gcc-ipq8074.c > index 32fd01ef469a..d382d16b9c10 100644 > --- a/drivers/clk/qcom/gcc-ipq8074.c > +++ b/drivers/clk/qcom/gcc-ipq8074.c > @@ -4712,6 +4712,7 @@ static const struct qcom_reset_map gcc_ipq8074_resets[] = { > [GCC_NSSPORT4_RESET] = { .reg = 0x68014, .bitmask = BIT(27) | GENMASK(9, 8) }, > [GCC_NSSPORT5_RESET] = { .reg = 0x68014, .bitmask = BIT(28) | GENMASK(11, 10) }, > [GCC_NSSPORT6_RESET] = { .reg = 0x68014, .bitmask = BIT(29) | GENMASK(13, 12) }, > + [GCC_WCSSAON_RESET] = { 0x59010, 0 }, Do you notice that you line is pretty significantly different from the previous lines? The time has passed since Stephen has acked this line in 2019. > }; > > static struct gdsc *gcc_ipq8074_gdscs[] = { > -- > 2.34.1 >
diff --git a/drivers/clk/qcom/gcc-ipq8074.c b/drivers/clk/qcom/gcc-ipq8074.c index 32fd01ef469a..d382d16b9c10 100644 --- a/drivers/clk/qcom/gcc-ipq8074.c +++ b/drivers/clk/qcom/gcc-ipq8074.c @@ -4712,6 +4712,7 @@ static const struct qcom_reset_map gcc_ipq8074_resets[] = { [GCC_NSSPORT4_RESET] = { .reg = 0x68014, .bitmask = BIT(27) | GENMASK(9, 8) }, [GCC_NSSPORT5_RESET] = { .reg = 0x68014, .bitmask = BIT(28) | GENMASK(11, 10) }, [GCC_NSSPORT6_RESET] = { .reg = 0x68014, .bitmask = BIT(29) | GENMASK(13, 12) }, + [GCC_WCSSAON_RESET] = { 0x59010, 0 }, }; static struct gdsc *gcc_ipq8074_gdscs[] = {