From patchwork Fri Aug 2 15:21:09 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Davis X-Patchwork-Id: 13751678 Received: from fllv0015.ext.ti.com (fllv0015.ext.ti.com [198.47.19.141]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4C90415C133; Fri, 2 Aug 2024 15:21:30 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.19.141 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1722612091; cv=none; b=uXBK+GHC0Mfz07Ht26vqQ7jDfJZQrvfdbYTNudN7q8qSD2IzoeLm5Tw2EujYQpNEILNbQek0FqqsnpDB8psbC1XobpIU+qPIhmybAYug5FAtCgGn90iXoYBuDYUqe3lr+xdgnS5IlI9HdoUh+opUh65xSyhKMTCrY0N7k+mR2Dw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1722612091; c=relaxed/simple; bh=2nZAOMcSJCaT69/GDR9w5DOfEgqbDDTv9vQRykhcQCY=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=lkKNf3NcYhF3kuvV4T9Y4olJnuN+z1Kb4Uu1Qvhb0hVobOV+a7PLfYC7Rq2y+JDQzRpmGUXW5xgNt9PMSKjZVPkDiuGOK9l47mo7SPb1vyyOElZFG4J0KadLtsDNOHlS34sFfkr2xuuLQtdwqWVqt/eCLwZRCTVdZ+dGBUcb2Ho= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com; spf=pass smtp.mailfrom=ti.com; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b=prZsjnTm; arc=none smtp.client-ip=198.47.19.141 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ti.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="prZsjnTm" Received: from lelv0266.itg.ti.com ([10.180.67.225]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 472FLGum022622; Fri, 2 Aug 2024 10:21:16 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1722612076; bh=rSINEMLQKp5dKg3nb0GwpjmEE7NlJqoQKsuh82SeeuU=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=prZsjnTmgpcFPohegaaWAUHjb936qZhNblDTsOZ0iVtxfVHV2yDlZFyyrsXHSwPAd r4YuFjHijL9RmTCIpYHudCV/WEfmCqlApVfHaJvdb9Z5aIEaBBb+GTQGw+0wDloSot JKH34E9GbZoebJo00ycbu3vzguzk1DuCNFOCYlFU= Received: from DFLE102.ent.ti.com (dfle102.ent.ti.com [10.64.6.23]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 472FLGmu108218 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Fri, 2 Aug 2024 10:21:16 -0500 Received: from DFLE107.ent.ti.com (10.64.6.28) by DFLE102.ent.ti.com (10.64.6.23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Fri, 2 Aug 2024 10:21:16 -0500 Received: from lelvsmtp6.itg.ti.com (10.180.75.249) by DFLE107.ent.ti.com (10.64.6.28) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Fri, 2 Aug 2024 10:21:16 -0500 Received: from fllvsmtp8.itg.ti.com ([10.249.42.149]) by lelvsmtp6.itg.ti.com (8.15.2/8.15.2) with ESMTP id 472FLAex007504; Fri, 2 Aug 2024 10:21:15 -0500 From: Andrew Davis To: Bjorn Andersson , Mathieu Poirier , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Philipp Zabel , Hari Nagalla CC: , , , , Andrew Davis Subject: [PATCH v11 9/9] arm64: defconfig: Enable TI K3 M4 remoteproc driver Date: Fri, 2 Aug 2024 10:21:09 -0500 Message-ID: <20240802152109.137243-10-afd@ti.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240802152109.137243-1-afd@ti.com> References: <20240802152109.137243-1-afd@ti.com> Precedence: bulk X-Mailing-List: linux-remoteproc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 From: Hari Nagalla Some K3 platform devices (AM64x, AM62x) have a Cortex M4 core. Build the M4 remote proc driver as a module for these platforms. Signed-off-by: Hari Nagalla Signed-off-by: Andrew Davis --- arch/arm64/configs/defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index 7d32fca649965..33b0487b0d607 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -1383,6 +1383,7 @@ CONFIG_QCOM_Q6V5_PAS=m CONFIG_QCOM_SYSMON=m CONFIG_QCOM_WCNSS_PIL=m CONFIG_TI_K3_DSP_REMOTEPROC=m +CONFIG_TI_K3_M4_REMOTEPROC=m CONFIG_TI_K3_R5_REMOTEPROC=m CONFIG_RPMSG_CHAR=m CONFIG_RPMSG_CTRL=m