| Message ID | 20240829134021.1452711-2-quic_gokulsri@quicinc.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | Add new driver for WCSS secure PIL loading | expand |
On Thu, Aug 29, 2024 at 07:10:18PM GMT, Gokul Sriram Palanisamy wrote: > From: Manikanta Mylavarapu <quic_mmanikan@quicinc.com> > > Add new binding document for hexagon based WCSS secure PIL remoteproc. > IPQ5332, IPQ9574 follows secure PIL remoteproc. What is the difference between PAS and secure PIL? > > Signed-off-by: Manikanta Mylavarapu <quic_mmanikan@quicinc.com> > Signed-off-by: Gokul Sriram Palanisamy <quic_gokulsri@quicinc.com> > --- > changes since v1: Addressed comments by Krzysztof > - expanded the acronym WCSS > - added 'maxItems' to property 'firmware-name' > - renamed sleep clock name 'im_sleep' to 'sleep' > - reordered items of property 'qcom,smem-states' keeping 'stop' > first. Addressed the same in example and in dtsi files. > - ordered required properties in the same order as property description > - dropped unused label 'q6v5_wcss' in example dts > > .../remoteproc/qcom,wcss-sec-pil.yaml | 125 ++++++++++++++++++ > 1 file changed, 125 insertions(+) > create mode 100644 Documentation/devicetree/bindings/remoteproc/qcom,wcss-sec-pil.yaml > > diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,wcss-sec-pil.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,wcss-sec-pil.yaml > new file mode 100644 > index 000000000000..98206b403681 > --- /dev/null > +++ b/Documentation/devicetree/bindings/remoteproc/qcom,wcss-sec-pil.yaml > @@ -0,0 +1,125 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/remoteproc/qcom,wcss-sec-pil.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Qualcomm WCSS Secure Peripheral Image Loader > + > +maintainers: > + - Manikanta Mylavarapu <quic_mmanikan@quicinc.com> > + > +description: > + Wireless Connectivity Subsystem (WCSS) Secure Peripheral Image Loader loads > + firmware and power up QDSP6 remoteproc on the Qualcomm IPQ9574, IPQ5332 SoC. > + > +properties: > + compatible: > + enum: > + - qcom,ipq5332-wcss-sec-pil > + - qcom,ipq9574-wcss-sec-pil > + > + reg: > + maxItems: 1 > + > + firmware-name: > + maxItems: 1 > + description: Firmware name for the Hexagon core > + > + interrupts: > + items: > + - description: Watchdog interrupt > + - description: Fatal interrupt > + - description: Ready interrupt > + - description: Handover interrupt > + - description: Stop acknowledge interrupt Does it make sense to make use of qcom,pas-common.yaml? > + > + interrupt-names: > + items: > + - const: wdog > + - const: fatal > + - const: ready > + - const: handover > + - const: stop-ack > +
On 29/08/2024 15:40, Gokul Sriram Palanisamy wrote: > From: Manikanta Mylavarapu <quic_mmanikan@quicinc.com> > > Add new binding document for hexagon based WCSS secure PIL remoteproc. > IPQ5332, IPQ9574 follows secure PIL remoteproc. > > Signed-off-by: Manikanta Mylavarapu <quic_mmanikan@quicinc.com> > Signed-off-by: Gokul Sriram Palanisamy <quic_gokulsri@quicinc.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Best regards, Krzysztof
diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,wcss-sec-pil.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,wcss-sec-pil.yaml new file mode 100644 index 000000000000..98206b403681 --- /dev/null +++ b/Documentation/devicetree/bindings/remoteproc/qcom,wcss-sec-pil.yaml @@ -0,0 +1,125 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/remoteproc/qcom,wcss-sec-pil.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm WCSS Secure Peripheral Image Loader + +maintainers: + - Manikanta Mylavarapu <quic_mmanikan@quicinc.com> + +description: + Wireless Connectivity Subsystem (WCSS) Secure Peripheral Image Loader loads + firmware and power up QDSP6 remoteproc on the Qualcomm IPQ9574, IPQ5332 SoC. + +properties: + compatible: + enum: + - qcom,ipq5332-wcss-sec-pil + - qcom,ipq9574-wcss-sec-pil + + reg: + maxItems: 1 + + firmware-name: + maxItems: 1 + description: Firmware name for the Hexagon core + + interrupts: + items: + - description: Watchdog interrupt + - description: Fatal interrupt + - description: Ready interrupt + - description: Handover interrupt + - description: Stop acknowledge interrupt + + interrupt-names: + items: + - const: wdog + - const: fatal + - const: ready + - const: handover + - const: stop-ack + + clocks: + items: + - description: sleep clock + + clock-names: + items: + - const: sleep + + qcom,smem-states: + $ref: /schemas/types.yaml#/definitions/phandle-array + description: States used by the AP to signal the remote processor + items: + - description: Stop Q6 + - description: Shutdown Q6 + + qcom,smem-state-names: + description: + Names of the states used by the AP to signal the remote processor + items: + - const: stop + - const: shutdown + + memory-region: + items: + - description: Q6 reserved region + + glink-edge: + $ref: /schemas/remoteproc/qcom,glink-edge.yaml# + description: + Qualcomm G-Link subnode which represents communication edge, channels + and devices related to the Modem. + unevaluatedProperties: false + +required: + - compatible + - reg + - firmware-name + - interrupts + - interrupt-names + - qcom,smem-states + - qcom,smem-state-names + - memory-region + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/clock/qcom,ipq5332-gcc.h> + remoteproc@d100000 { + compatible = "qcom,ipq5332-wcss-sec-pil"; + reg = <0xd100000 0x4040>; + firmware-name = "ath12k/IPQ5332/hw1.0/q6_fw0.mdt"; + interrupts-extended = <&intc GIC_SPI 291 IRQ_TYPE_EDGE_RISING>, + <&wcss_smp2p_in 0 IRQ_TYPE_NONE>, + <&wcss_smp2p_in 1 IRQ_TYPE_NONE>, + <&wcss_smp2p_in 2 IRQ_TYPE_NONE>, + <&wcss_smp2p_in 3 IRQ_TYPE_NONE>; + interrupt-names = "wdog", + "fatal", + "ready", + "handover", + "stop-ack"; + + clocks = <&gcc GCC_IM_SLEEP_CLK>; + clock-names = "sleep"; + + qcom,smem-states = <&wcss_smp2p_out 1>, + <&wcss_smp2p_out 0>; + qcom,smem-state-names = "stop", + "shutdown"; + + memory-region = <&q6_region>; + + glink-edge { + interrupts = <GIC_SPI 417 IRQ_TYPE_EDGE_RISING>; + label = "rtr"; + qcom,remote-pid = <1>; + mboxes = <&apcs_glb 8>; + }; + };