From patchwork Fri Oct 25 20:59:24 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Arnaud POULIQUEN X-Patchwork-Id: 13851832 Received: from mx07-00178001.pphosted.com (mx07-00178001.pphosted.com [185.132.182.106]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 56CBC502BE; Fri, 25 Oct 2024 21:03:25 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.132.182.106 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729890207; cv=none; b=AdhmYK72zvZ0hGSK6fqyrafosoNWxA7xyHfDsgwf1Zeg1fhKpnlaOl9ogm+a0THsz8/8O3qs7yfcXjWe8vSzpsawyQndZNfhJ/0CMnb5Ttod9WzCbhDygoNW1LMnJvAZPUMezZDBONgDS9fZFrhRwCdgjyJI51dGMUdbJMrBwek= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729890207; c=relaxed/simple; bh=8+eOfgdOL3D5NLY4FwvfLFF9lqlqe+qmNuypUUwY+Aw=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=qgXY/X77/xOmNuV2SjL9QVpaPzw0J9/xcoD2UeAzNHLLaGidScXCD8jRfxblSQnUZZS6O3k7c01QiydKgp3mFxWxBKWb8KUjy99k/CTv7eLPGa9mh74JlGD9eB/R0NBBQ70XetnUy/RT6dgeodayJ5v+Nzh8r1aFeq1lRpsDPtc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=foss.st.com; spf=pass smtp.mailfrom=foss.st.com; dkim=pass (2048-bit key) header.d=foss.st.com header.i=@foss.st.com header.b=gf0Wf6E/; arc=none smtp.client-ip=185.132.182.106 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=foss.st.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=foss.st.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=foss.st.com header.i=@foss.st.com header.b="gf0Wf6E/" Received: from pps.filterd (m0241204.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 49PKNFM8032472; Fri, 25 Oct 2024 23:03:05 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=foss.st.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=selector1; bh= 3mIGA/VKnuka7n9OIMQrgaNhc9IQtQWXIf1b7a7uZQ8=; b=gf0Wf6E/02+Wk+Jl St6hB4jcAr38XkUtUINZp1s83h07/DgeUueGQpNfNg9hOCP/FhsRpcE+Olli4ZWp S5BxcuTxeGKOJ1kvmDcDSdVeNimi5+E/77saoGeocnOGEECWpYKWzfU23abK/7D2 i5eSXtYQ6Xus9WGRo9YlAAUO9gHyKArafOQ2092oqwewCX9GQzquPKY87l7dQ+qV Dj9Y2DjTpUfRUTN0sgSbetQJmeTq2YUFE3upXQistW/KZ99Wvg7Fy6Il5NR7hS4E qGGOd5QPqk/cMaQOA0vPHYefpyjrkxmNfhvO8hSDcvLVoYr8IZJPnz80HpR9nJvu F7kFqg== Received: from beta.dmz-ap.st.com (beta.dmz-ap.st.com [138.198.100.35]) by mx07-00178001.pphosted.com (PPS) with ESMTPS id 42gaur9vft-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 25 Oct 2024 23:03:05 +0200 (MEST) Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-ap.st.com (STMicroelectronics) with ESMTP id 80CC14002D; Fri, 25 Oct 2024 23:01:38 +0200 (CEST) Received: from Webmail-eu.st.com (eqndag1node5.st.com [10.75.129.134]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id DFE5D231949; Fri, 25 Oct 2024 22:59:41 +0200 (CEST) Received: from SAFDAG1NODE1.st.com (10.75.90.17) by EQNDAG1NODE5.st.com (10.75.129.134) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.37; Fri, 25 Oct 2024 22:59:41 +0200 Received: from localhost (10.252.3.121) by SAFDAG1NODE1.st.com (10.75.90.17) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.37; Fri, 25 Oct 2024 22:59:41 +0200 From: Arnaud Pouliquen To: Bjorn Andersson , Mathieu Poirier , Jens Wiklander , "Rob Herring" , Krzysztof Kozlowski , Conor Dooley CC: , , , , , , Arnaud Pouliquen Subject: [PATCH v12 7/7] remoteproc: stm32: Add support of an OP-TEE TA to load the firmware Date: Fri, 25 Oct 2024 22:59:24 +0200 Message-ID: <20241025205924.2087768-8-arnaud.pouliquen@foss.st.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20241025205924.2087768-1-arnaud.pouliquen@foss.st.com> References: <20241025205924.2087768-1-arnaud.pouliquen@foss.st.com> Precedence: bulk X-Mailing-List: linux-remoteproc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: SAFCAS1NODE2.st.com (10.75.90.13) To SAFDAG1NODE1.st.com (10.75.90.17) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 The new TEE remoteproc driver is used to manage remote firmware in a secure, trusted context. The 'st,stm32mp1-m4-tee' compatibility is introduced to delegate the loading of the firmware to the trusted execution context. In such cases, the firmware should be signed and adhere to the image format defined by the TEE. Signed-off-by: Arnaud Pouliquen --- updates vs previous version - rename structures, variables and function from tee_rproc_xxx to rproc_tee_xxx, - rework code to take into account rproc_tee_register and rproc_tee_unregister APIs update, - optimize code around dev_err_probe() when rproc_tee_register() fails. --- drivers/remoteproc/stm32_rproc.c | 57 ++++++++++++++++++++++++++++++-- 1 file changed, 54 insertions(+), 3 deletions(-) diff --git a/drivers/remoteproc/stm32_rproc.c b/drivers/remoteproc/stm32_rproc.c index 288bd70c7861..7875b26a38a5 100644 --- a/drivers/remoteproc/stm32_rproc.c +++ b/drivers/remoteproc/stm32_rproc.c @@ -18,6 +18,7 @@ #include #include #include +#include #include #include #include @@ -255,6 +256,19 @@ static int stm32_rproc_release(struct rproc *rproc) return 0; } +static int stm32_rproc_tee_stop(struct rproc *rproc) +{ + int err; + + stm32_rproc_request_shutdown(rproc); + + err = rproc_tee_stop(rproc); + if (err) + return err; + + return stm32_rproc_release(rproc); +} + static int stm32_rproc_prepare(struct rproc *rproc) { struct device *dev = rproc->dev.parent; @@ -691,8 +705,20 @@ static const struct rproc_ops st_rproc_ops = { .get_boot_addr = rproc_elf_get_boot_addr, }; +static const struct rproc_ops st_rproc_tee_ops = { + .prepare = stm32_rproc_prepare, + .start = rproc_tee_start, + .stop = stm32_rproc_tee_stop, + .kick = stm32_rproc_kick, + .load = rproc_tee_load_fw, + .parse_fw = rproc_tee_parse_fw, + .find_loaded_rsc_table = rproc_tee_find_loaded_rsc_table, + .release_fw = rproc_tee_release_fw, +}; + static const struct of_device_id stm32_rproc_match[] = { { .compatible = "st,stm32mp1-m4" }, + { .compatible = "st,stm32mp1-m4-tee" }, {}, }; MODULE_DEVICE_TABLE(of, stm32_rproc_match); @@ -853,15 +879,36 @@ static int stm32_rproc_probe(struct platform_device *pdev) struct device_node *np = dev->of_node; struct rproc *rproc; unsigned int state; + u32 proc_id; int ret; ret = dma_coerce_mask_and_coherent(dev, DMA_BIT_MASK(32)); if (ret) return ret; - rproc = devm_rproc_alloc(dev, np->name, &st_rproc_ops, NULL, sizeof(*ddata)); - if (!rproc) - return -ENOMEM; + if (of_device_is_compatible(np, "st,stm32mp1-m4-tee")) { + /* + * Delegate the firmware management to the secure context. + * The firmware loaded has to be signed. + */ + ret = of_property_read_u32(np, "st,proc-id", &proc_id); + if (ret) { + dev_err(dev, "failed to read st,rproc-id property\n"); + return ret; + } + + rproc = devm_rproc_alloc(dev, np->name, &st_rproc_tee_ops, NULL, sizeof(*ddata)); + if (!rproc) + return -ENOMEM; + + ret = rproc_tee_register(dev, rproc, proc_id); + if (ret) + return dev_err_probe(dev, ret, "signed firmware not supported by TEE\n"); + } else { + rproc = devm_rproc_alloc(dev, np->name, &st_rproc_ops, NULL, sizeof(*ddata)); + if (!rproc) + return -ENOMEM; + } ddata = rproc->priv; @@ -913,6 +960,8 @@ static int stm32_rproc_probe(struct platform_device *pdev) dev_pm_clear_wake_irq(dev); device_init_wakeup(dev, false); } + rproc_tee_unregister(rproc); + return ret; } @@ -933,6 +982,8 @@ static void stm32_rproc_remove(struct platform_device *pdev) dev_pm_clear_wake_irq(dev); device_init_wakeup(dev, false); } + + rproc_tee_unregister(rproc); } static int stm32_rproc_suspend(struct device *dev)