From patchwork Tue Nov 26 09:10:37 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Arnaud Pouliquen X-Patchwork-Id: 13885616 Received: from mx07-00178001.pphosted.com (mx07-00178001.pphosted.com [185.132.182.106]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6AB3D1B6CFB; Tue, 26 Nov 2024 09:14:00 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.132.182.106 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1732612442; cv=none; b=qXHiSOYumseMg9pKgJFa71GI7NcCMHyC00har/p4GEODEDsLzid2uMWBntIkr6G19PoriWTQZvtclAz0lyr4qHi6d/Rmf7Pl2MrDXOpMoQT3emtkubztfMO1X/hUHYejSVDO9j9Ol+/q313P1x6vyGqC1KnswtsclZpb+qw6AdU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1732612442; c=relaxed/simple; bh=RKYsAEvQRXWIAuP82l+zFeTBW2y8hvA6zPeWxu5FfUQ=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=Ue+rHFegTyVx4jCv6S6zFU6S0S8+6XeuaFyQhkW+whxz6NuvDH/yKsRZ1egoDevPkyHYqdyTiJSF3SSLPynuao39vrpX2k/O7lQmdkaqdg77Qyey1MRnmweEmXY8nrdvWf3beOkYYdqA8UEK4ANJhEVnjZ8dlMi7eLpzSSchqtI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=foss.st.com; spf=pass smtp.mailfrom=foss.st.com; dkim=pass (2048-bit key) header.d=foss.st.com header.i=@foss.st.com header.b=euXoHiUl; arc=none smtp.client-ip=185.132.182.106 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=foss.st.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=foss.st.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=foss.st.com header.i=@foss.st.com header.b="euXoHiUl" Received: from pps.filterd (m0241204.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 4AQ7VsmW014099; Tue, 26 Nov 2024 10:13:50 +0100 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=foss.st.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=selector1; bh= gaYYKQhdt5+WppBYnImCivL9U494+2hjcdM9oi2RwHw=; b=euXoHiUlLOezMdTv oPPz+INVtc7NkWE7kkRoWJ6mR8GeDQIz9Gpb5DiDmblrJynQ1lBWCBl05AWnz0DU LRUAeFug13fkbT87TXyhVGVb0z9SEIYF/aG0DyhKyEEnD39FE7X8DJYxfqLoAHHo mzoqHUazvOszd6YdJnsgqUIDYjHlYlVripR236atcK+cMZ4x4wg+EL6KU6b2V+uv XQ/BfGtp+A9LeO50vBf9MsWZBJn/taKWoyPdEA42nXidPxbj1PIRH3FvVqcPl+ja nW5NPCU01FNJ4ahzAK8G7NBB10kGIM5IyzAN3DMOjJj8aasSx1s/hut0mV7xGfvd 8O1Rpw== Received: from beta.dmz-ap.st.com (beta.dmz-ap.st.com [138.198.100.35]) by mx07-00178001.pphosted.com (PPS) with ESMTPS id 433791uya7-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 26 Nov 2024 10:13:49 +0100 (CET) Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-ap.st.com (STMicroelectronics) with ESMTP id 99BC140051; Tue, 26 Nov 2024 10:12:49 +0100 (CET) Received: from Webmail-eu.st.com (eqndag1node4.st.com [10.75.129.133]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 81DF026B651; Tue, 26 Nov 2024 10:11:16 +0100 (CET) Received: from SAFDAG1NODE1.st.com (10.75.90.17) by EQNDAG1NODE4.st.com (10.75.129.133) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.37; Tue, 26 Nov 2024 10:11:16 +0100 Received: from localhost (10.48.86.121) by SAFDAG1NODE1.st.com (10.75.90.17) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.37; Tue, 26 Nov 2024 10:11:16 +0100 From: Arnaud Pouliquen To: Bjorn Andersson , Mathieu Poirier , Rob Herring , "Krzysztof Kozlowski" , Conor Dooley , "Maxime Coquelin" , Alexandre Torgue , Fabien Dessenne , Arnaud Pouliquen CC: , , , , Subject: [PATCH v14 6/8] dt-bindings: remoteproc: Add compatibility for TEE support Date: Tue, 26 Nov 2024 10:10:37 +0100 Message-ID: <20241126091042.918144-7-arnaud.pouliquen@foss.st.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20241126091042.918144-1-arnaud.pouliquen@foss.st.com> References: <20241126091042.918144-1-arnaud.pouliquen@foss.st.com> Precedence: bulk X-Mailing-List: linux-remoteproc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: SAFCAS1NODE1.st.com (10.75.90.11) To SAFDAG1NODE1.st.com (10.75.90.17) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 The "st,stm32mp1-m4-tee" compatible is utilized in a system configuration where the Cortex-M4 firmware is loaded by the Trusted Execution Environment (TEE). For instance, this compatible is used in both the Linux and OP-TEE device trees: - In OP-TEE, a node is defined in the device tree with the "st,stm32mp1-m4-tee" compatible to support signed remoteproc firmware. Based on DT properties, the OP-TEE remoteproc framework is initiated to expose a trusted application service to authenticate and load the remote processor firmware provided by the Linux remoteproc framework, as well as to start and stop the remote processor. - In Linux, when the compatibility is set, the Cortex-M resets should not be declared in the device tree. In such a configuration, the reset is managed by the OP-TEE remoteproc driver and is no longer accessible from the Linux kernel. Associated with this new compatible, add the "st,proc-id" property to identify the remote processor. This ID is used to define a unique ID, common between Linux, U-Boot, and OP-TEE, to identify a coprocessor. This ID will be used in requests to the OP-TEE remoteproc Trusted Application to specify the remote processor. Signed-off-by: Arnaud Pouliquen Reviewed-by: Rob Herring (Arm) --- .../bindings/remoteproc/st,stm32-rproc.yaml | 58 ++++++++++++++++--- 1 file changed, 50 insertions(+), 8 deletions(-) diff --git a/Documentation/devicetree/bindings/remoteproc/st,stm32-rproc.yaml b/Documentation/devicetree/bindings/remoteproc/st,stm32-rproc.yaml index 370af61d8f28..409123cd4667 100644 --- a/Documentation/devicetree/bindings/remoteproc/st,stm32-rproc.yaml +++ b/Documentation/devicetree/bindings/remoteproc/st,stm32-rproc.yaml @@ -16,7 +16,12 @@ maintainers: properties: compatible: - const: st,stm32mp1-m4 + enum: + - st,stm32mp1-m4 + - st,stm32mp1-m4-tee + description: + Use "st,stm32mp1-m4" for the Cortex-M4 coprocessor management by non-secure context + Use "st,stm32mp1-m4-tee" for the Cortex-M4 coprocessor management by secure context reg: description: @@ -43,6 +48,10 @@ properties: - description: The offset of the hold boot setting register - description: The field mask of the hold boot + st,proc-id: + description: remote processor identifier + $ref: /schemas/types.yaml#/definitions/uint32 + st,syscfg-tz: deprecated: true description: @@ -142,21 +151,43 @@ properties: required: - compatible - reg - - resets allOf: - if: properties: - reset-names: - not: - contains: - const: hold_boot + compatible: + contains: + const: st,stm32mp1-m4 then: + if: + properties: + reset-names: + not: + contains: + const: hold_boot + then: + required: + - st,syscfg-holdboot + else: + properties: + st,syscfg-holdboot: false + required: + - reset-names required: - - st,syscfg-holdboot - else: + - resets + + - if: + properties: + compatible: + contains: + const: st,stm32mp1-m4-tee + then: properties: st,syscfg-holdboot: false + reset-names: false + resets: false + required: + - st,proc-id additionalProperties: false @@ -188,5 +219,16 @@ examples: st,syscfg-rsc-tbl = <&tamp 0x144 0xFFFFFFFF>; st,syscfg-m4-state = <&tamp 0x148 0xFFFFFFFF>; }; + - | + #include + m4@10000000 { + compatible = "st,stm32mp1-m4-tee"; + reg = <0x10000000 0x40000>, + <0x30000000 0x40000>, + <0x38000000 0x10000>; + st,proc-id = <0>; + st,syscfg-rsc-tbl = <&tamp 0x144 0xFFFFFFFF>; + st,syscfg-m4-state = <&tamp 0x148 0xFFFFFFFF>; + }; ...