Message ID | 1556155517-5054-1-git-send-email-cv-dong@jinso.co.jp (mailing list archive) |
---|---|
Headers | show |
Series | Add TPU support for R-Car H3/M3-W/M3-N | expand |
Hi, On Thu, Apr 25, 2019 at 10:25:12AM +0900, Cao Van Dong wrote: > This series adds tpu support for r8a7795/r8a7796/r8a77965 SoCs. > Based on the renesas-drivers-2019-04-02-v5.1-rc3 tag of renesas-drivers tree. > For test, after booting, I found the device was registered in the booting log. Could you clarify some details of this test. Looking at the DTS patches I see 'status = "disabled";' for each of the newly added devices. So I would not expect them to be probed at run-time without some extra tweaking. > > Cao Van Dong (5): > clk: renesas: r8a779{5|6|65}: Add TPU clock > arm64: dts: renesas: r8a7795: Add TPU support > arm64: dts: renesas: r8a7796: Add TPU support > arm64: dts: renesas: r8a77965: Add TPU support > dt-bindings: pwm: renesas: tpu: Document R8A779{5|6|65} bindings > > Documentation/devicetree/bindings/pwm/renesas,tpu-pwm.txt | 3 +++ > arch/arm64/boot/dts/renesas/r8a7795.dtsi | 11 +++++++++++ > arch/arm64/boot/dts/renesas/r8a7796.dtsi | 11 +++++++++++ > arch/arm64/boot/dts/renesas/r8a77965.dtsi | 11 +++++++++++ > drivers/clk/renesas/r8a7795-cpg-mssr.c | 1 + > drivers/clk/renesas/r8a7796-cpg-mssr.c | 1 + > drivers/clk/renesas/r8a77965-cpg-mssr.c | 1 + > 7 files changed, 39 insertions(+) > > -- > 2.7.4 >
Dear Simon-san, On 2019/04/26 18:41, Simon Horman wrote: > Hi, > > On Thu, Apr 25, 2019 at 10:25:12AM +0900, Cao Van Dong wrote: >> This series adds tpu support for r8a7795/r8a7796/r8a77965 SoCs. >> Based on the renesas-drivers-2019-04-02-v5.1-rc3 tag of renesas-drivers tree. >> For test, after booting, I found the device was registered in the booting log. > Could you clarify some details of this test. > > Looking at the DTS patches I see 'status = "disabled";' for each > of the newly added devices. So I would not expect them to be probed > at run-time without some extra tweaking. Test procedure: - Apply patch series "[PATCH 0/4] pinctrl: sh-pfc: r8a7795/6/65: Add TPU pins, groups and functions". - Make sure switches { SW29-[1-2] are switched off or SW31-[1-4] are switched off(only for Salvator-xs) }. - Enable TPU and pin control in DTS (salvator-x/xs.dtsi): + +&tpu { + pinctrl-0 = <&tpu_pins>; + pinctrl-names = "default"; + + status = "okay"; +}; + +&pfc { + tpu_pins: tpu { + groups = "tpu_to2", "tpu_to3"; + function = "tpu"; + }; +}; - Exercise userspace PWM control for pwm[2,3] of /sys/class/pwm/pwmchip1/ . - Inspect PWM signals on the input side of { CN29-[58,60] or SW31-[1,2] (only for Salvator-xs) } using an oscilloscope. Thank you, Dong >> Cao Van Dong (5): >> clk: renesas: r8a779{5|6|65}: Add TPU clock >> arm64: dts: renesas: r8a7795: Add TPU support >> arm64: dts: renesas: r8a7796: Add TPU support >> arm64: dts: renesas: r8a77965: Add TPU support >> dt-bindings: pwm: renesas: tpu: Document R8A779{5|6|65} bindings >> >> Documentation/devicetree/bindings/pwm/renesas,tpu-pwm.txt | 3 +++ >> arch/arm64/boot/dts/renesas/r8a7795.dtsi | 11 +++++++++++ >> arch/arm64/boot/dts/renesas/r8a7796.dtsi | 11 +++++++++++ >> arch/arm64/boot/dts/renesas/r8a77965.dtsi | 11 +++++++++++ >> drivers/clk/renesas/r8a7795-cpg-mssr.c | 1 + >> drivers/clk/renesas/r8a7796-cpg-mssr.c | 1 + >> drivers/clk/renesas/r8a77965-cpg-mssr.c | 1 + >> 7 files changed, 39 insertions(+) >> >> -- >> 2.7.4 >>
On Thu, Apr 25, 2019 at 10:25:12AM +0900, Cao Van Dong wrote: > This series adds tpu support for r8a7795/r8a7796/r8a77965 SoCs. > Based on the renesas-drivers-2019-04-02-v5.1-rc3 tag of renesas-drivers tree. > For test, after booting, I found the device was registered in the booting log. > > Cao Van Dong (5): > clk: renesas: r8a779{5|6|65}: Add TPU clock > arm64: dts: renesas: r8a7795: Add TPU support > arm64: dts: renesas: r8a7796: Add TPU support > arm64: dts: renesas: r8a77965: Add TPU support > dt-bindings: pwm: renesas: tpu: Document R8A779{5|6|65} bindings Thanks, I have applied the dts patches for inclusion in v5.3 based on a) Testing by Geert and yourself; and b) A belief that the hardware is very similar on the SoCs covered by this patchset