From patchwork Tue Oct 30 10:44:36 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Phil Edworthy X-Patchwork-Id: 10660659 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 72AFB13BF for ; Tue, 30 Oct 2018 10:44:53 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 511F229CD6 for ; Tue, 30 Oct 2018 10:44:53 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 4233329CEE; Tue, 30 Oct 2018 10:44:53 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 9F33229CD6 for ; Tue, 30 Oct 2018 10:44:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726720AbeJ3Ths (ORCPT ); Tue, 30 Oct 2018 15:37:48 -0400 Received: from relmlor3.renesas.com ([210.160.252.173]:9905 "EHLO relmlie2.idc.renesas.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726692AbeJ3Ths (ORCPT ); Tue, 30 Oct 2018 15:37:48 -0400 Received: from unknown (HELO relmlir3.idc.renesas.com) ([10.200.68.153]) by relmlie2.idc.renesas.com with ESMTP; 30 Oct 2018 19:44:49 +0900 Received: from relmlii2.idc.renesas.com (relmlii2.idc.renesas.com [10.200.68.66]) by relmlir3.idc.renesas.com (Postfix) with ESMTP id 7821C95C4C; Tue, 30 Oct 2018 19:44:49 +0900 (JST) X-IronPort-AV: E=Sophos;i="5.54,444,1534777200"; d="scan'208";a="296394845" Received: from unknown (HELO vbox.ree.adwin.renesas.com) ([10.226.37.67]) by relmlii2.idc.renesas.com with ESMTP; 30 Oct 2018 19:44:46 +0900 From: Phil Edworthy To: Marc Zyngier , Thomas Gleixner , Jason Cooper , Rob Herring , Mark Rutland Cc: Geert Uytterhoeven , linux-renesas-soc@vger.kernel.org, linux-kernel@vger.kernel.org, Phil Edworthy , devicetree@vger.kernel.org Subject: [PATCH v2 0/2] irqchip: Add support for Renesas RZ/N1 GPIO interrupt multiplexer Date: Tue, 30 Oct 2018 10:44:36 +0000 Message-Id: <20181030104438.27827-1-phil.edworthy@renesas.com> X-Mailer: git-send-email 2.17.1 Sender: linux-renesas-soc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-renesas-soc@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP On RZ/N1 devices, there are lots of GPIO interrupts that are multiplexed before getting to the GIC interrupt controller. Other than the multiplexing, there is no other logic applied to the signals. The multiplexing cannot be handled dynamically because there is another CPU that runs firmware. It's likely that the firmware will use some of these GPIO interrupts and so we don't want them to move around. Signed-off-by: Phil Edworthy --- v2: - Split DT bindings into separate patch. - Use interrupt-map to allow the GPIO controller info to be specified as part of the irq. - Don't show status in binding examples. - Don't show the soc/board split in binding doc. - Renamed struct and funcs from 'girq' to a more comprehenisble 'irqmux'. Phil Edworthy (2): dt-bindings/interrupt-controller: rzn1: Add RZ/N1 gpio irq mux binding irqchip: Add support for Renesas RZ/N1 GPIO interrupt multiplexer .../interrupt-controller/renesas,rzn1-mux.txt | 92 +++++++ drivers/irqchip/Kconfig | 10 + drivers/irqchip/Makefile | 1 + drivers/irqchip/rzn1-irq-mux.c | 235 ++++++++++++++++++ 4 files changed, 338 insertions(+) create mode 100644 Documentation/devicetree/bindings/interrupt-controller/renesas,rzn1-mux.txt create mode 100644 drivers/irqchip/rzn1-irq-mux.c