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[v2,0/5] Renesas RZ/G2L CANFD support

Message ID 20210719143811.2135-1-prabhakar.mahadev-lad.rj@bp.renesas.com (mailing list archive)
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Series Renesas RZ/G2L CANFD support | expand

Message

Prabhakar July 19, 2021, 2:38 p.m. UTC 
Hi All,

This patch series adds CANFD support to Renesas RZ/G2L family.

CANFD block on RZ/G2L SoC is almost identical to one found on
R-Car Gen3 SoC's. On RZ/G2L SoC interrupt sources for each channel
are split into individual sources.

Cheers,
Prabhakar

Changes for v2:
* Added interrupt-names property and marked it as required for 
  RZ/G2L family
* Added descriptions for reset property
* Re-used irq handlers on RZ/G2L SoC
* Added new enum for chip_id
* Dropped R9A07G044_LAST_CORE_CLK
* Dropped patch (clk: renesas: r9a07g044-cpg: Add clock and reset
  entries for CANFD) as its been merged into renesas tree

Lad Prabhakar (5):
  dt-bindings: net: can: renesas,rcar-canfd: Document RZ/G2L SoC
  can: rcar_canfd: Add support for RZ/G2L family
  dt-bindings: clk: r9a07g044-cpg: Add entry for P0_DIV2 core clock
  clk: renesas: r9a07g044-cpg: Add entry for fixed clock P0_DIV2
  arm64: dts: renesas: r9a07g044: Add CANFD node

 .../bindings/net/can/renesas,rcar-canfd.yaml  |  66 ++++++-
 arch/arm64/boot/dts/renesas/r9a07g044.dtsi    |  42 +++++
 drivers/clk/renesas/r9a07g044-cpg.c           |   3 +-
 drivers/net/can/rcar/rcar_canfd.c             | 178 +++++++++++++++---
 include/dt-bindings/clock/r9a07g044-cpg.h     |   1 +
 5 files changed, 252 insertions(+), 38 deletions(-)


base-commit: 2734d6c1b1a089fb593ef6a23d4b70903526fe0c